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author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-02-26 23:25:55 +0000 |
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committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-02-28 22:48:19 +0000 |
commit | 550abe7396f60274ffd0c5f373eda046af9d9a85 (patch) | |
tree | 27e3173068e8c044f3c006b664abcf03270ed460 /doc | |
parent | 4c9f29bd9c9e38c3f495f8c26869f4dfe8fe9983 (diff) | |
download | riscv-openocd-550abe7396f60274ffd0c5f373eda046af9d9a85.zip riscv-openocd-550abe7396f60274ffd0c5f373eda046af9d9a85.tar.gz riscv-openocd-550abe7396f60274ffd0c5f373eda046af9d9a85.tar.bz2 |
CortexM3: move disassemble cmd to arm cmd group
Rather than using a Cortex disassemble cmd, we now use
the arm generic version.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/openocd.texi | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 9da2977..d54ad12 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -6427,12 +6427,6 @@ If @var{value} is defined, first assigns that. @subsection Cortex-M3 specific commands @cindex Cortex-M3 -@deffn Command {cortex_m3 disassemble} address [count] -@cindex disassemble -Disassembles @var{count} Thumb2 instructions starting at @var{address}. -If @var{count} is not specified, a single instruction is disassembled. -@end deffn - @deffn Command {cortex_m3 maskisr} (@option{on}|@option{off}) Control masking (disabling) interrupts during target step/resume. @end deffn |