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author | Jan Matyas <jan.matyas@codasip.com> | 2023-10-31 17:01:18 +0100 |
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committer | Jan Matyas <jan.matyas@codasip.com> | 2023-10-31 17:01:18 +0100 |
commit | c127e845630ffce68b28c1bfb5afcaee65b54a20 (patch) | |
tree | e607a9923cdced349423c5bf121a62e109c16ff2 /doc | |
parent | c92149afc386502ef49d3f279d9ed42f648c9ba0 (diff) | |
download | riscv-openocd-c127e845630ffce68b28c1bfb5afcaee65b54a20.zip riscv-openocd-c127e845630ffce68b28c1bfb5afcaee65b54a20.tar.gz riscv-openocd-c127e845630ffce68b28c1bfb5afcaee65b54a20.tar.bz2 |
Removed mention of "riscv set_scratch_ram" from doc
This command no longer exists, was removed in:
https://github.com/riscv/riscv-openocd/commit/ead2a595b8491ed48ce2ced81d2935dc8a4c4973
Remove it from the doc as well.
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/openocd.texi | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 7e9eb20..ed6fb79 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -10833,11 +10833,6 @@ Set the maximum time to wait for a hart to come out of reset after reset is deasserted. @end deffn -@deffn {Command} {riscv set_scratch_ram} none|[address] -Set the address of 16 bytes of scratch RAM the debugger can use, or 'none'. -This is used to access 64-bit floating point registers on 32-bit targets. -@end deffn - @deffn {Command} {riscv set_mem_access} method1 [method2] [method3] Specify which RISC-V memory access method(s) shall be used, and in which order of priority. At least one method must be specified. |