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author | Andreas Färber <afaerber@suse.de> | 2016-05-03 01:47:54 +0200 |
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committer | Tomas Vanek <vanekt@fbl.cz> | 2018-06-06 15:49:14 +0100 |
commit | f1427cca3cc6097a4635b4095ad1e30c8a508ac0 (patch) | |
tree | b81d433173a7bf4325bd9fd247f31ddd5a89aa3f /doc | |
parent | 2d5f2ede55150235352773a976166c3ab68297bc (diff) | |
download | riscv-openocd-f1427cca3cc6097a4635b4095ad1e30c8a508ac0.zip riscv-openocd-f1427cca3cc6097a4635b4095ad1e30c8a508ac0.tar.gz riscv-openocd-f1427cca3cc6097a4635b4095ad1e30c8a508ac0.tar.bz2 |
psoc5lp: Add EEPROM flash driver
Tested on CY8CKIT-059.
Change-Id: Ib02262e8eebf0df3d29492b8a7daa65b262da580
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3433
Tested-by: jenkins
Diffstat (limited to 'doc')
-rw-r--r-- | doc/openocd.texi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 5c82838..d8a7bb9 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -6168,6 +6168,17 @@ and all row latches in all flash arrays on the device. @end deffn @end deffn +@deffn {Flash Driver} psoc5lp_eeprom +All members of the PSoC 5LP microcontroller family from Cypress +include internal EEPROM and use ARM Cortex-M3 cores. +The driver probes for a number of these chips and autoconfigures itself, +apart from the base address. + +@example +flash bank $_CHIPNAME.eeprom psoc5lp_eeprom 0x40008000 0 0 0 $_TARGETNAME +@end example +@end deffn + @deffn {Flash Driver} psoc6 Supports PSoC6 (CY8C6xxx) family of Cypress microcontrollers. PSoC6 is a dual-core device with CM0+ and CM4 cores. Both cores share |