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authorduane <duane@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-11-30 22:25:43 +0000
committerduane <duane@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-11-30 22:25:43 +0000
commita28eaa85f73759bb189a46308642502c9fa5aa4b (patch)
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parent91afc3dc3083a3d4f6a4104a5132d87c8ec03c7f (diff)
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jtag newtap change & huge manual update
git-svn-id: svn://svn.berlios.de/openocd/trunk@1194 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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+Reporting Unknown JTAG TAP IDS
+------------------------------
+
+If OpenOCD reports an UNKNOWN or Unexpected Tap ID please report it to
+the development mailing list - However - keep reading.
+
+openocd-development@lists.berlios.de.
+
+========================================
+
+About "UNEXPECTED" tap ids.
+
+ Before reporting an "UNEXPECTED TAP ID" - take a closer look.
+ Perhaps you have your OpenOCD configured the wrong way, maybe you
+ have the tap configured the wrong way? Or something else is wrong.
+ (Remember: OpenOCD does not stop if the tap is not present)
+
+ This "tap id check" is there for a purpose.
+ The goal is to help get the *right* configuration.
+
+The idea is this:
+
+ Every JTAG tap is suppose to have "a unique 32bit tap id" number.
+ They are suppose to be "sort of unique" but they are not. There are
+ no guarantees.
+
+Version Number Changes:
+
+ Sometimes, the tap ID only differs by VERSION number. If so - it's
+ not a big deal. Please do report this information. We'd like to
+ know about it.
+
+ For example
+
+Error: ERROR: Tap: s3c4510.cpu - Expected id: 0x3f0f0f0f, Got: 0x1f0f0f0f
+Error: ERROR: expected: mfg: 0x787, part: 0xf0f0, ver: 0x3
+Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x1
+
+========================================
+
+Updating the Tap ID number your self
+
+ Why do this? You just want the warning to go away. And don't want
+ to update your version/instance of OpenOCD.
+
+ On simple systems, to fix this problem, in your "openocd.cfg" file,
+ override the tap id. Depending on the tap, add one of these 3
+ commands:
+
+ set CPUTAPID newvalue
+ or set BSTAPID newvalue
+ or set FLASHTAPID newvalue
+ or set ETMTAPID newvalue
+
+ Where "newvalue" is the new value you are seeing.
+
+ On complex systems, (with many taps and chips) you probably have a
+ custom configuration file. Its is more complicated, you're going to
+ have to read through the configuration files
+
+========================================
+
+What to send:
+
+Cut & paste the output of OpenOCD that pointed you at this file.
+
+Please include the VERSION number of OpenOCD you are using.
+
+And please include the information below.
+
+========================================
+
+A) The JTAG TAP ID code.
+
+This is always a 32bit hex number.
+
+Examples:
+ 0x1f0f0f0f - is an old ARM7TDMI
+ 0x3f0f0f0f - is a newer ARM7TDMI
+ 0x3ba00477 - is an ARM cortex M3
+
+Some chips have multiple JTAG taps - be sure to list
+each one individually - ORDER is important!
+
+========================================
+B) The maker of the part
+
+Examples:
+ Xilinx, Atmel, ST Micro Systems, Freescale
+
+========================================
+C) The family of parts it belongs to
+
+Examples:
+ "NXP LPC Series"
+ "Atmel SAM7 Series"
+
+========================================
+
+D) The actual part number on the package
+
+ For example: "S3C45101x01"
+
+========================================
+
+E) What type of board it is.
+
+ie: a "commercial off the self eval board" that one can purchase (as
+opposed to your private internal custom board)
+
+For example: ST Micro systems has Eval boards, so does Analog Devices
+
+Or - if it is inside something "hackers like to hack" that information
+is helpful too.
+
+For example: A consumer GPS unit or a cellphone
+
+========================================
+
+(F) The maker of the board
+ ie: Olimex, LogicPD, Freescale(eval board)
+
+========================================
+
+(G) Identifying information on the board.
+
+ Not good: "iar red ST eval board"
+
+ Really good: "IAR STR912-SK evaluation board"
+
+========================================
+
+(H) Are there other interesting (JTAG) chips on the board?
+
+ ie: An FPGA or CPLD ...
+
+========================================