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| author | Nicolas Pitre <nico@fluxnic.net> | 2009-12-03 17:27:13 -0500 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-12-03 18:42:01 -0800 |
| commit | ed59dfc80aa6fc48a0894c8e46cee675f38ac949 (patch) | |
| tree | 2f0e0d1f3efb989f5b43f794536cce04bbd3e622 /NEWS | |
| parent | f62c035c5277871193fa9904f430cf57221c0b89 (diff) | |
| download | riscv-openocd-ed59dfc80aa6fc48a0894c8e46cee675f38ac949.zip riscv-openocd-ed59dfc80aa6fc48a0894c8e46cee675f38ac949.tar.gz riscv-openocd-ed59dfc80aa6fc48a0894c8e46cee675f38ac949.tar.bz2 | |
basic ARM semihosting support
Semihosting enables code running on an ARM target to use the
I/O facilities on the host computer. The target application must
be linked against a library that forwards operation requests by
using the SVC instruction that is trapped at the Supervisor Call
vector by the debugger. The "hosted" library version provided
with CodeSourcery's Sourcery G++ Lite for ARM EABI is one example.
This is currently available for ARM9 processors, but any ARM
variant should be able to support this with little additional work.
Tested using binaries compiled with Sourcery G++ Lite 2009q1-161
and ARM RVCT 3.0.
[dbrownell@users.sourceforge.net: doc tweaks, NEWS]
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'NEWS')
| -rw-r--r-- | NEWS | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -17,6 +17,7 @@ Target Layer: - register names use "sp" not "r13" - add top-level "mcr" and "mrc" commands, replacing various core-specific operations + - basic semihosting support ARM11 - Preliminary ETM and ETB hookup - accelerated "flash erase_check" |