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| author | Attila Kinali <attila@kinali.ch> | 2011-10-27 12:14:55 +0200 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2011-11-10 15:41:44 +0000 |
| commit | 4c3a87c28f61edc9b83d96142792fb0fc937f371 (patch) | |
| tree | c5bfb3662ced36a357bc321b39ee1b61136cd820 /BUGS | |
| parent | 86e3cd20dd8738285c078c30a3b4d2a0cf57052b (diff) | |
| download | riscv-openocd-4c3a87c28f61edc9b83d96142792fb0fc937f371.zip riscv-openocd-4c3a87c28f61edc9b83d96142792fb0fc937f371.tar.gz riscv-openocd-4c3a87c28f61edc9b83d96142792fb0fc937f371.tar.bz2 | |
Work around silicon bug in the SAM3 family flash waitstates
* Add flash waitstate support for Atmel SAM3 chips.
* Set default waitstates to 6, to workaround a silicon bug in the SAM3 family
This code has been tested on SAM3U4, SAM3N4 and SAM3N1
based on Change-Id: I477446f9bfb3e910ea3e2414a6e9a75beb14a214
by Jim Norris <u17263@att.net>
Change-Id: I8d360080f6968979ca5e197ad638282cadd18fb7
Signed-off-by: Attila Kinali <attila@kinali.ch>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/128
Tested-by: jenkins
Diffstat (limited to 'BUGS')
0 files changed, 0 insertions, 0 deletions