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| author | Andreas Färber <afaerber@suse.de> | 2016-05-08 20:41:51 +0200 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2016-05-22 15:49:51 +0100 |
| commit | e0ba93d018aef12b8e5ccbfe3e7a6fed06eb7258 (patch) | |
| tree | aa0db0264c982f2b7c1afb4a68add80d668d5279 | |
| parent | 1eb19b8de5bf2f6699766f2178d1ef04ce4579a6 (diff) | |
| download | riscv-openocd-e0ba93d018aef12b8e5ccbfe3e7a6fed06eb7258.zip riscv-openocd-e0ba93d018aef12b8e5ccbfe3e7a6fed06eb7258.tar.gz riscv-openocd-e0ba93d018aef12b8e5ccbfe3e7a6fed06eb7258.tar.bz2 | |
armv7m: Integrate build of checksum code
Add rules to build armv7m_crc.inc and include it via preprocessor.
Change-Id: I4482c7acb8454de28bdf210d9f06c0720ada490a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3474
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
| -rw-r--r-- | contrib/loaders/checksum/Makefile | 19 | ||||
| -rw-r--r-- | contrib/loaders/checksum/armv7m_crc.inc | 5 | ||||
| -rw-r--r-- | src/target/armv7m.c | 34 |
3 files changed, 25 insertions, 33 deletions
diff --git a/contrib/loaders/checksum/Makefile b/contrib/loaders/checksum/Makefile new file mode 100644 index 0000000..393c160 --- /dev/null +++ b/contrib/loaders/checksum/Makefile @@ -0,0 +1,19 @@ +BIN2C = ../../../src/helper/bin2char.sh + +ARM_CROSS_COMPILE ?= arm-none-eabi- +ARM_AS ?= $(ARM_CROSS_COMPILE)as +ARM_OBJCOPY ?= $(ARM_CROSS_COMPILE)objcopy + +arm: armv7m_crc.inc + +armv7m_%.elf: armv7m_%.s + $(ARM_AS) $< -o $@ + +armv7m_%.bin: armv7m_%.elf + $(ARM_OBJCOPY) -Obinary $< $@ + +armv7m_%.inc: armv7m_%.bin + $(BIN2C) < $< > $@ + +clean: + -rm -f *.elf *.bin *.inc diff --git a/contrib/loaders/checksum/armv7m_crc.inc b/contrib/loaders/checksum/armv7m_crc.inc new file mode 100644 index 0000000..1b013fd --- /dev/null +++ b/contrib/loaders/checksum/armv7m_crc.inc @@ -0,0 +1,5 @@ +/* Autogenerated with ../../../src/helper/bin2char.sh */ +0x02,0x46,0x00,0x20,0xc0,0x43,0x0a,0x4e,0x0b,0x46,0x00,0x24,0x0d,0xe0,0x11,0x5d, +0x09,0x06,0x48,0x40,0x00,0x25,0x00,0x28,0x02,0xda,0x40,0x00,0x70,0x40,0x00,0xe0, +0x40,0x00,0x01,0x35,0x08,0x2d,0xf6,0xd1,0x01,0x34,0x9c,0x42,0xef,0xd1,0x00,0xbe, +0xb7,0x1d,0xc1,0x04, diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 8662003..8432a41 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -686,40 +686,8 @@ int armv7m_checksum_memory(struct target *target, struct reg_param reg_params[2]; int retval; - /* see contrib/loaders/checksum/armv7m_crc.s for src */ - static const uint8_t cortex_m_crc_code[] = { - /* main: */ - 0x02, 0x46, /* mov r2, r0 */ - 0x00, 0x20, /* movs r0, #0 */ - 0xC0, 0x43, /* mvns r0, r0 */ - 0x0A, 0x4E, /* ldr r6, CRC32XOR */ - 0x0B, 0x46, /* mov r3, r1 */ - 0x00, 0x24, /* movs r4, #0 */ - 0x0D, 0xE0, /* b ncomp */ - /* nbyte: */ - 0x11, 0x5D, /* ldrb r1, [r2, r4] */ - 0x09, 0x06, /* lsls r1, r1, #24 */ - 0x48, 0x40, /* eors r0, r0, r1 */ - 0x00, 0x25, /* movs r5, #0 */ - /* loop: */ - 0x00, 0x28, /* cmp r0, #0 */ - 0x02, 0xDA, /* bge notset */ - 0x40, 0x00, /* lsls r0, r0, #1 */ - 0x70, 0x40, /* eors r0, r0, r6 */ - 0x00, 0xE0, /* b cont */ - /* notset: */ - 0x40, 0x00, /* lsls r0, r0, #1 */ - /* cont: */ - 0x01, 0x35, /* adds r5, r5, #1 */ - 0x08, 0x2D, /* cmp r5, #8 */ - 0xF6, 0xD1, /* bne loop */ - 0x01, 0x34, /* adds r4, r4, #1 */ - /* ncomp: */ - 0x9C, 0x42, /* cmp r4, r3 */ - 0xEF, 0xD1, /* bne nbyte */ - 0x00, 0xBE, /* bkpt #0 */ - 0xB7, 0x1D, 0xC1, 0x04 /* CRC32XOR: .word 0x04c11db7 */ +#include "../../contrib/loaders/checksum/armv7m_crc.inc" }; retval = target_alloc_working_area(target, sizeof(cortex_m_crc_code), &crc_algorithm); |