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| author | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2013-09-28 22:25:52 +0200 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2013-10-31 20:44:55 +0000 |
| commit | bee7836b6a155b89f454b64f626a497c767f13f6 (patch) | |
| tree | 2bda086c62422e569741f96c2c944aaa7cdad131 | |
| parent | 4831236af4a49c315b79923ba31b80243969a901 (diff) | |
| download | riscv-openocd-bee7836b6a155b89f454b64f626a497c767f13f6.zip riscv-openocd-bee7836b6a155b89f454b64f626a497c767f13f6.tar.gz riscv-openocd-bee7836b6a155b89f454b64f626a497c767f13f6.tar.bz2 | |
stm32f1x: Fix byte order bug and remove unnecessary cast
Found by grepping for pointer casts.
Change-Id: Ibd8f22a9e9ca71459ba0bedc8447a3623d0e4184
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1773
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
| -rw-r--r-- | src/flash/nor/stm32f1x.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c index 66a0ee5..af7d9ea 100644 --- a/src/flash/nor/stm32f1x.c +++ b/src/flash/nor/stm32f1x.c @@ -626,7 +626,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, }; retval = target_write_buffer(target, write_algorithm->address, - sizeof(stm32x_flash_write_code), (uint8_t *)stm32x_flash_write_code); + sizeof(stm32x_flash_write_code), stm32x_flash_write_code); if (retval != ERROR_OK) return retval; @@ -1316,10 +1316,10 @@ COMMAND_HANDLER(stm32x_handle_options_read_command) int user_data = optionbyte; - if (buf_get_u32((uint8_t *)&optionbyte, OPT_ERROR, 1)) + if (optionbyte >> OPT_ERROR & 1) command_print(CMD_CTX, "Option Byte Complement Error"); - if (buf_get_u32((uint8_t *)&optionbyte, OPT_READOUT, 1)) + if (optionbyte >> OPT_READOUT & 1) command_print(CMD_CTX, "Readout Protection On"); else command_print(CMD_CTX, "Readout Protection Off"); @@ -1327,23 +1327,23 @@ COMMAND_HANDLER(stm32x_handle_options_read_command) /* user option bytes are offset depending on variant */ optionbyte >>= stm32x_info->option_offset; - if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDWDGSW, 1)) + if (optionbyte >> OPT_RDWDGSW & 1) command_print(CMD_CTX, "Software Watchdog"); else command_print(CMD_CTX, "Hardware Watchdog"); - if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDRSTSTOP, 1)) + if (optionbyte >> OPT_RDRSTSTOP & 1) command_print(CMD_CTX, "Stop: No reset generated"); else command_print(CMD_CTX, "Stop: Reset generated"); - if (buf_get_u32((uint8_t *)&optionbyte, OPT_RDRSTSTDBY, 1)) + if (optionbyte >> OPT_RDRSTSTDBY & 1) command_print(CMD_CTX, "Standby: No reset generated"); else command_print(CMD_CTX, "Standby: Reset generated"); if (stm32x_info->has_dual_banks) { - if (buf_get_u32((uint8_t *)&optionbyte, OPT_BFB2, 1)) + if (optionbyte >> OPT_BFB2 & 1) command_print(CMD_CTX, "Boot: Bank 0"); else command_print(CMD_CTX, "Boot: Bank 1"); |