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| author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2016-11-15 22:10:03 +0100 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2017-02-24 09:13:10 +0000 |
| commit | 7ed0b6333ded06f1e517d7fd3e15a400c98dc357 (patch) | |
| tree | e69ac77778c9d5e5b1755dc6c708e0b3f51fdefc | |
| parent | fa8700cdd58752671fb8d60ef65bf767e4aa1bc5 (diff) | |
| download | riscv-openocd-7ed0b6333ded06f1e517d7fd3e15a400c98dc357.zip riscv-openocd-7ed0b6333ded06f1e517d7fd3e15a400c98dc357.tar.gz riscv-openocd-7ed0b6333ded06f1e517d7fd3e15a400c98dc357.tar.bz2 | |
aarch64: optimize core state detection
Replace loop by right-shift.
Inspired by patch from Alamy Liu
Change-Id: I1285f4f54c0695a93fa42e9863ed8ffa4de00f70
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3985
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
| -rw-r--r-- | src/target/armv8_dpm.c | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index 56e2eb8..ac53460 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -51,17 +51,11 @@ enum arm_state armv8_dpm_get_core_state(struct arm_dpm *dpm) { int el = (dpm->dscr >> 8) & 0x3; int rw = (dpm->dscr >> 10) & 0xF; - int pos; dpm->last_el = el; - /* find the first '0' in DSCR.RW */ - for (pos = 3; pos >= 0; pos--) { - if ((rw & (1 << pos)) == 0) - break; - } - - if (el > pos) + /* In Debug state, each bit gives the current Execution state of each EL */ + if ((rw >> el) & 0b1) return ARM_STATE_AARCH64; return ARM_STATE_ARM; |