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authorPalmer Dabbelt <palmer@dabbelt.com>2018-05-30 17:36:22 -0700
committerPalmer Dabbelt <palmer@dabbelt.com>2018-05-30 17:36:22 -0700
commitd2cd725dd35d7be7218786cbf8fc08254432a285 (patch)
tree5d3f5155e7153e68ceb7aed7062b93f901443a5d
parent6d9e69499f3f6810434c1eb5acf69d6275fddfd0 (diff)
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Invalidate the register cache when touching another hart
The 0.13 code now caches registers interally, so when reading registers on a diferent hart we need to invalidate the cache.
-rw-r--r--src/target/riscv/riscv.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 1d83bad..123d8de 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1840,7 +1840,15 @@ int riscv_get_register_on_hart(struct target *target, riscv_reg_t *value,
int hartid, enum gdb_regno regid)
{
RISCV_INFO(r);
+
+ if (hartid != riscv_current_hartid(target))
+ riscv_invalidate_register_cache(target);
+
int result = r->get_register(target, value, hartid, regid);
+
+ if (hartid != riscv_current_hartid(target))
+ riscv_invalidate_register_cache(target);
+
LOG_DEBUG("[%d] %s: %" PRIx64, hartid, gdb_regno_name(regid), *value);
return result;
}