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| author | Marc Schink <openocd-dev@marcschink.de> | 2019-02-26 14:11:46 +0100 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2019-03-06 16:21:06 +0000 |
| commit | e243075962fc11f0b217db72d68819355c1be7dc (patch) | |
| tree | 75c2076c42eeba974de3beaea6ab86afb76eb9d9 | |
| parent | 6431a85b0ad3a39895be780053d589a1bf1b88c2 (diff) | |
| download | riscv-openocd-e243075962fc11f0b217db72d68819355c1be7dc.zip riscv-openocd-e243075962fc11f0b217db72d68819355c1be7dc.tar.gz riscv-openocd-e243075962fc11f0b217db72d68819355c1be7dc.tar.bz2 | |
target/openrisc/x86_32_common: Use 'bool' data type
Change-Id: I395a36ddd7ac7e85bc54f6bb073a93b0c6f24db0
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4972
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
| -rw-r--r-- | src/target/x86_32_common.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/target/x86_32_common.c b/src/target/x86_32_common.c index ef4f806..011e7d8 100644 --- a/src/target/x86_32_common.c +++ b/src/target/x86_32_common.c @@ -939,14 +939,14 @@ static int set_debug_regs(struct target *t, uint32_t address, * when we exit PM */ buf_set_u32(x86_32->cache->reg_list[bp_num+DR0].value, 0, 32, address); - x86_32->cache->reg_list[bp_num+DR0].dirty = 1; - x86_32->cache->reg_list[bp_num+DR0].valid = 1; + x86_32->cache->reg_list[bp_num+DR0].dirty = true; + x86_32->cache->reg_list[bp_num+DR0].valid = true; buf_set_u32(x86_32->cache->reg_list[DR6].value, 0, 32, PM_DR6); - x86_32->cache->reg_list[DR6].dirty = 1; - x86_32->cache->reg_list[DR6].valid = 1; + x86_32->cache->reg_list[DR6].dirty = true; + x86_32->cache->reg_list[DR6].valid = true; buf_set_u32(x86_32->cache->reg_list[DR7].value, 0, 32, dr7); - x86_32->cache->reg_list[DR7].dirty = 1; - x86_32->cache->reg_list[DR7].valid = 1; + x86_32->cache->reg_list[DR7].dirty = true; + x86_32->cache->reg_list[DR7].valid = true; return ERROR_OK; } @@ -970,14 +970,14 @@ static int unset_debug_regs(struct target *t, uint8_t bp_num) * when we exit PM */ buf_set_u32(x86_32->cache->reg_list[bp_num+DR0].value, 0, 32, 0); - x86_32->cache->reg_list[bp_num+DR0].dirty = 1; - x86_32->cache->reg_list[bp_num+DR0].valid = 1; + x86_32->cache->reg_list[bp_num+DR0].dirty = true; + x86_32->cache->reg_list[bp_num+DR0].valid = true; buf_set_u32(x86_32->cache->reg_list[DR6].value, 0, 32, PM_DR6); - x86_32->cache->reg_list[DR6].dirty = 1; - x86_32->cache->reg_list[DR6].valid = 1; + x86_32->cache->reg_list[DR6].dirty = true; + x86_32->cache->reg_list[DR6].valid = true; buf_set_u32(x86_32->cache->reg_list[DR7].value, 0, 32, dr7); - x86_32->cache->reg_list[DR7].dirty = 1; - x86_32->cache->reg_list[DR7].valid = 1; + x86_32->cache->reg_list[DR7].dirty = true; + x86_32->cache->reg_list[DR7].valid = true; return ERROR_OK; } |