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| author | Christopher Head <chead@zaber.com> | 2018-10-30 14:37:22 -0700 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2019-03-14 14:18:30 +0000 |
| commit | 8d748f426c7a9c750ffc7cabfbb87bc2cecd82d3 (patch) | |
| tree | 930106be791a7a8d2c058fa43391a076ecf37f86 | |
| parent | 0323c9bcbd608f74ab40f63eb62e0cdb4d022401 (diff) | |
| download | riscv-openocd-8d748f426c7a9c750ffc7cabfbb87bc2cecd82d3.zip riscv-openocd-8d748f426c7a9c750ffc7cabfbb87bc2cecd82d3.tar.gz riscv-openocd-8d748f426c7a9c750ffc7cabfbb87bc2cecd82d3.tar.bz2 | |
flash/stm32h7x: remove IWDG1_SW separate variable
Bit 4 in OPTSR is IWDG1_SW (the code originally called it IWDG1_HW, but
the reference manual refers to it as IWDG1_SW). This is broken out into
a separate variable, independent_watchdog_selection, in stm32x_options.
However, this is not necessary: bit 4 is included in the user_options
field, which includes all of bits 2 through 7, and
independent_watchdog_selection is not referenced anywhere else. Delete
the field and just rely on user_options to transport that bit, along
with all the other bits it contains, between stm32x_read_options and
stm32x_write_options.
Change-Id: I4da63df9272cf091267b956c412b95671ea1d3c9
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4744
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
| -rw-r--r-- | src/flash/nor/stm32h7x.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c index ad76af4..d21e9fa 100644 --- a/src/flash/nor/stm32h7x.c +++ b/src/flash/nor/stm32h7x.c @@ -78,9 +78,6 @@ #define OPT_LOCK (1 << 0) #define OPT_START (1 << 1) -/* FLASH_OPTCUR bit definitions (reading) */ -#define IWDG1_HW (1 << 4) - /* register unlock keys */ #define KEY1 0x45670123 #define KEY2 0xCDEF89AB @@ -109,7 +106,6 @@ struct stm32x_options { uint8_t user_options; uint8_t user2_options; uint8_t user3_options; - uint8_t independent_watchdog_selection; }; struct stm32h7x_part_info { @@ -327,11 +323,6 @@ static int stm32x_read_options(struct flash_bank *bank) stm32x_info->option_bytes.user2_options = (optiondata >> 16) & 0xff; stm32x_info->option_bytes.user3_options = (optiondata >> 24) & 0x83; - if (optiondata & IWDG1_HW) - stm32x_info->option_bytes.independent_watchdog_selection = 1; - else - stm32x_info->option_bytes.independent_watchdog_selection = 0; - if (stm32x_info->option_bytes.RDP != 0xAA) LOG_INFO("Device Security Bit Set"); @@ -368,11 +359,6 @@ static int stm32x_write_options(struct flash_bank *bank) optiondata |= (stm32x_info->option_bytes.user2_options & 0xff) << 16; optiondata |= (stm32x_info->option_bytes.user3_options & 0x83) << 24; - if (stm32x_info->option_bytes.independent_watchdog_selection) - optiondata |= IWDG1_HW; - else - optiondata &= ~IWDG1_HW; - /* program options */ retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTPRG, optiondata); if (retval != ERROR_OK) |