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| author | Tim Newsome <tim@sifive.com> | 2017-06-19 08:46:02 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2017-06-19 08:46:02 -0700 |
| commit | 4d264b35790f7edaca01f2b2e38664f123138d0d (patch) | |
| tree | 25137e34772625f24c941602ba805a4d9cdaea1a | |
| parent | 6082f35a5587d110d4bcf2c540d1ffa55db4ab63 (diff) | |
| download | riscv-openocd-4d264b35790f7edaca01f2b2e38664f123138d0d.zip riscv-openocd-4d264b35790f7edaca01f2b2e38664f123138d0d.tar.gz riscv-openocd-4d264b35790f7edaca01f2b2e38664f123138d0d.tar.bz2 | |
Put early DEBUG notice of XLEN back.
| -rw-r--r-- | src/target/riscv/riscv-013.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 21363c9..f1d4cfb 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -1155,6 +1155,11 @@ static int examine(struct target *target) r->xlen[i] = 64; } + /* Display this as early as possible to help people who are using + * really slow simulators. */ + LOG_DEBUG(" hart %d: XLEN=%d, program buffer at 0x%" PRIx64, i, + r->xlen[i], r->debug_buffer_addr[i]); + if (riscv_program_gah(&program64, r->debug_buffer_addr[i])) { LOG_ERROR("This implementation will not work with hart %d with debug_buffer_addr of 0x%lx\n", i, (long)r->debug_buffer_addr[i]); |