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authorNishanth Menon <nm@ti.com>2022-01-03 13:23:38 -0600
committerAntonio Borneo <borneo.antonio@gmail.com>2022-03-12 09:41:42 +0000
commitd323fa1d194c8b18ec7d8284e5c8a33ac2b77f07 (patch)
treede9f5146293b2112fe707c3f103acecb9742aec2
parentde4f52179c513cba194079f9fe1ce3a0532bdc9f (diff)
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tcl/target/ti_k3: Add AM625 SoC
Add support for the latest in TI k3 family AM625 SoC. For further details, see https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Nishanth Menon <nm@ti.com> Change-Id: Ia54d0eab1c30a973afb1c2c61f4c5a72d29d9b78 Reviewed-on: https://review.openocd.org/c/openocd/+/6798 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
-rw-r--r--tcl/target/ti_k3.cfg25
1 files changed, 25 insertions, 0 deletions
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 6040837..254bb69 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -88,6 +88,31 @@ switch $_soc {
# M4 processor
set _gp_mcu_cores 1
}
+ am625 {
+ set _CHIPNAME am625
+ set _K3_DAP_TAPID 0x0bb7e02f
+
+ # AM625 has 1 clusters of 4 A53 cores.
+ set _armv8_cpu_name a53
+ set _armv8_cores 4
+ set ARMV8_DBGBASE {0x90010000 0x90110000 0x90210000 0x90310000}
+ set ARMV8_CTIBASE {0x90020000 0x90120000 0x90220000 0x90320000}
+
+ # AM625 has 1 cluster of 1 R5s core.
+ set _r5_cores 1
+ set R5_NAMES {main0_r5.0}
+ set R5_DBGBASE {0x9d410000}
+ set R5_CTIBASE {0x9d418000}
+
+ # sysctrl CTI base
+ set CM3_CTIBASE {0x20001000}
+ # Sysctrl power-ap unlock offsets
+ set _sysctrl_ap_unlock_offsets {0xf0 0x78}
+
+ # M4 processor
+ set _gp_mcu_cores 1
+ set _gp_mcu_ap_unlock_offsets {0xf0 0x7c}
+ }
j721e {
set _CHIPNAME j721e
set _K3_DAP_TAPID 0x0bb6402f