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| author | Tim Newsome <tim@sifive.com> | 2020-06-09 12:49:37 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-06-09 12:49:37 -0700 |
| commit | 97fb3f4bd428fbaaa27e5fbfd238e3000a4ead54 (patch) | |
| tree | 2675ddef15a2e29b4d56ccd2de81b6ca0b4d416a | |
| parent | 95a8cd9b5d07501ac2243c61f331b092b1ea9894 (diff) | |
| download | riscv-openocd-97fb3f4bd428fbaaa27e5fbfd238e3000a4ead54.zip riscv-openocd-97fb3f4bd428fbaaa27e5fbfd238e3000a4ead54.tar.gz riscv-openocd-97fb3f4bd428fbaaa27e5fbfd238e3000a4ead54.tar.bz2 | |
Add RISC-V to README. (#482)
Change-Id: Ie70833a8b357c4f3ec6ae4472a77bfc409a448bf
| -rw-r--r-- | README | 2 |
1 files changed, 1 insertions, 1 deletions
@@ -118,7 +118,7 @@ Debug targets ARM11, ARM7, ARM9, AVR32, Cortex-A, Cortex-R, Cortex-M, LS102x-SAP, Feroceon/Dragonite, DSP563xx, DSP5680xx, EnSilica eSi-RISC, FA526, MIPS -EJTAG, NDS32, XScale, Intel Quark. +EJTAG, NDS32, RISC-V, XScale, Intel Quark. Flash drivers ------------- |