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| author | Dolu1990 <charles.papon.90@gmail.com> | 2022-04-11 16:58:35 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-04-11 07:58:35 -0700 |
| commit | 78b56e25c217338519d51818dce663742c783da9 (patch) | |
| tree | 9656869ecb8315dc5a4936eeb7f436eb4d8d84eb | |
| parent | 0a70e59cb86deed71fd92ceffdd233478e237ebb (diff) | |
| download | riscv-openocd-78b56e25c217338519d51818dce663742c783da9.zip riscv-openocd-78b56e25c217338519d51818dce663742c783da9.tar.gz riscv-openocd-78b56e25c217338519d51818dce663742c783da9.tar.bz2 | |
riscv: Increase batch allocation size to improve transfer speed. (#689)
Change-Id: I4cd1479f4d2f7b63cd594f5cef9d6b3d877d9015
Signed-off-by: Charles Papon <charles.papon.90@gmail.com>
| -rw-r--r-- | src/target/riscv/riscv-013.c | 6 | ||||
| -rw-r--r-- | src/target/riscv/riscv.h | 2 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index b719fa4..63b40c6 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -3151,7 +3151,7 @@ static int read_memory_progbuf_inner(struct target *target, target_addr_t addres * dm_data0 contains[read_addr-size*2] */ - struct riscv_batch *batch = riscv_batch_alloc(target, 32, + struct riscv_batch *batch = riscv_batch_alloc(target, RISCV_BATCH_ALLOC_SIZE, info->dmi_busy_delay + info->ac_busy_delay); if (!batch) return ERROR_FAIL; @@ -3649,7 +3649,7 @@ static int write_memory_bus_v1(struct target *target, target_addr_t address, struct riscv_batch *batch = riscv_batch_alloc( target, - 32, + RISCV_BATCH_ALLOC_SIZE, info->dmi_busy_delay + info->bus_master_write_delay); if (!batch) return ERROR_FAIL; @@ -3843,7 +3843,7 @@ static int write_memory_progbuf(struct target *target, target_addr_t address, struct riscv_batch *batch = riscv_batch_alloc( target, - 32, + RISCV_BATCH_ALLOC_SIZE, info->dmi_busy_delay + info->ac_busy_delay); if (!batch) goto error; diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index 5dc2152..f3b7530 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -29,6 +29,8 @@ struct riscv_program; #define RISCV_NUM_MEM_ACCESS_METHODS 3 +#define RISCV_BATCH_ALLOC_SIZE 128 + extern struct target_type riscv011_target; extern struct target_type riscv013_target; |