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author | Tim Newsome <tim@sifive.com> | 2017-10-24 11:38:39 -0700 |
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committer | Tim Newsome <tim@sifive.com> | 2017-10-24 11:38:39 -0700 |
commit | 59a03402610bb92c1298586fcef212c17c5d0644 (patch) | |
tree | 833b4c8ea78f9428c1c17b7ba0d84759c56fa712 | |
parent | 8432b7cf3da8cf6862d8c86d46812f8b24af8bdf (diff) | |
download | riscv-openocd-59a03402610bb92c1298586fcef212c17c5d0644.zip riscv-openocd-59a03402610bb92c1298586fcef212c17c5d0644.tar.gz riscv-openocd-59a03402610bb92c1298586fcef212c17c5d0644.tar.bz2 |
Remove more unused code.
Change-Id: I962660f58d948f85df6e073065e15e5d8f4a02b6
-rw-r--r-- | src/target/riscv/riscv-013.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index d536a2d..e9c5458 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -167,9 +167,6 @@ typedef struct { bool need_strict_step; - // Some memoized values - int progbuf_addr, data_addr, data_size; - bool abstract_read_csr_supported; bool abstract_write_csr_supported; bool abstract_read_fpr_supported; @@ -908,9 +905,6 @@ static int init_target(struct command_context *cmd_ctx, riscv013_info_t *info = get_info(target); info->progbufsize = -1; - info->progbuf_addr = -1; - info->data_size = -1; - info->data_addr = -1; info->dmi_busy_delay = 0; info->ac_busy_delay = 0; |