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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-03-02 12:57:08 +0100 |
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committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-03-03 22:49:47 +0100 |
commit | df500c5a0494decd708ddebe8ed1efed081ded55 (patch) | |
tree | 35728eed7ea07b68c48a23ed2ad308e899195f28 | |
parent | a4bf71386b2fce8864363c64c2ce2584ad2d1907 (diff) | |
download | riscv-openocd-df500c5a0494decd708ddebe8ed1efed081ded55.zip riscv-openocd-df500c5a0494decd708ddebe8ed1efed081ded55.tar.gz riscv-openocd-df500c5a0494decd708ddebe8ed1efed081ded55.tar.bz2 |
at91: add at91sam9g45 support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
-rw-r--r-- | tcl/target/at91sam9g45.cfg | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/tcl/target/at91sam9g45.cfg b/tcl/target/at91sam9g45.cfg new file mode 100644 index 0000000..7323679 --- /dev/null +++ b/tcl/target/at91sam9g45.cfg @@ -0,0 +1,16 @@ +###################################### +# Target: Atmel AT91SAM9G45 +###################################### + +if { [info exists CHIPNAME] } { + set AT91_CHIPNAME $CHIPNAME +} else { + set AT91_CHIPNAME at91sam9g45 +} + +source [find target/at91sam9.cfg] + +# Establish internal SRAM memory work areas that are important to pre-bootstrap loaders, etc. The +# AT91SAM9G45 has one SRAM area starting at 0x00300000 of 64 KiB. + +$_TARGETNAME configure -work-area-phys 0x00300000 -work-area-size 0x200000 -work-area-backup 1 |