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authorTim Newsome <tim@sifive.com>2018-06-11 14:39:59 -0700
committerGitHub <noreply@github.com>2018-06-11 14:39:59 -0700
commit32f6d6a857ed9548428dd095e51a646e7fbab9de (patch)
treecf7d57644c512792611bd03c3d80a8078534d4ee
parentf098b553c928d38409fb1823c1d47b1853c5062a (diff)
parent68336052f8368eb6934530062f1af34ab2586d37 (diff)
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Merge pull request #265 from riscv/cleanup
Remove dead code.
-rw-r--r--src/rtos/riscv_debug.c11
1 files changed, 0 insertions, 11 deletions
diff --git a/src/rtos/riscv_debug.c b/src/rtos/riscv_debug.c
index 90caf40..fa8f13a 100644
--- a/src/rtos/riscv_debug.c
+++ b/src/rtos/riscv_debug.c
@@ -22,11 +22,6 @@ static int riscv_create_rtos(struct target *target)
struct riscv_rtos *r = calloc(1, sizeof(*r));
target->rtos->rtos_specific_params = r;
-#if 0
- r->target_hartid = 0;
- r->target_any_hart = true;
- r->target_every_hart = true;
-#endif
target->rtos->current_threadid = 1;
target->rtos->current_thread = 1;
@@ -266,12 +261,6 @@ static int riscv_get_thread_reg_list(struct rtos *rtos, int64_t thread_id, char
{
LOG_DEBUG("Updating RISC-V register list for hart %d", (int)(thread_id - 1));
-#if 0
- LOG_ERROR(" Not actually updating");
- *hex_reg_list = 0;
- return JIM_OK;
-#endif
-
size_t n_regs = 32;
size_t xlen = 64;
size_t reg_chars = xlen / 8 * 2;