diff options
| author | Megan Wachs <megan@sifive.com> | 2018-02-13 13:47:14 -0800 |
|---|---|---|
| committer | Megan Wachs <megan@sifive.com> | 2018-02-13 13:47:14 -0800 |
| commit | 8f7195af76dd5ba048e6d82758ff21a24b660d01 (patch) | |
| tree | ef9e500390714a8bd7b151c82a13faf8cd141b16 | |
| parent | 313885cb3bf3278b7a6600a942c7d13b984580c6 (diff) | |
| download | riscv-openocd-8f7195af76dd5ba048e6d82758ff21a24b660d01.zip riscv-openocd-8f7195af76dd5ba048e6d82758ff21a24b660d01.tar.gz riscv-openocd-8f7195af76dd5ba048e6d82758ff21a24b660d01.tar.bz2 | |
riscv-compliance: Turn off ABSTRACTAUTO until the appropriate time
| -rw-r--r-- | src/target/riscv/riscv-013.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index c6f60b3..74abfc5 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2431,6 +2431,7 @@ int riscv013_test_compliance(struct target *target) { // See which bits are actually writable dmi_write(target, DMI_ABSTRACTAUTO, 0xFFFFFFFF); uint32_t abstractauto = dmi_read(target, DMI_ABSTRACTAUTO); + dmi_write(target, DMI_ABSTRACTAUTO, 0x0); if (abstractauto > 0) { testvar = 0; // TODO: This mechanism only works when you have a reasonable sized progbuf, which is not |