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author | Tim Newsome <tim@sifive.com> | 2017-02-15 19:05:51 -0800 |
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committer | Tim Newsome <tim@sifive.com> | 2017-02-15 19:05:51 -0800 |
commit | 035b4dd17a258cf9a2f8d316cbb1a480bc119635 (patch) | |
tree | 6c2c881c7b79ef64ff707b27e6389cca745f4f82 | |
parent | 713c001242d7d85c08b66c05ebfad89f6fca96ee (diff) | |
download | riscv-openocd-035b4dd17a258cf9a2f8d316cbb1a480bc119635.zip riscv-openocd-035b4dd17a258cf9a2f8d316cbb1a480bc119635.tar.gz riscv-openocd-035b4dd17a258cf9a2f8d316cbb1a480bc119635.tar.bz2 |
Fix double read, which might have side effects.
Now passing MemTest{8,16,32,64}
Change-Id: I286d1e2a388d41853e5aa9049490ddb6135b61f1
-rw-r--r-- | src/target/riscv/riscv-013.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index edce7d1..7861e66 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -468,14 +468,16 @@ static uint64_t dmi_read(struct target *target, uint16_t address) uint16_t address_in; unsigned i = 0; - dmi_scan(target, &address_in, &value, DMI_OP_READ, address, 0); - do { + for (i = 0; i < 256; i++) { status = dmi_scan(target, &address_in, &value, DMI_OP_READ, address, 0); if (status == DMI_STATUS_BUSY) { increase_dmi_busy_delay(target); + } else { + break; } - } while (((status != DMI_STATUS_SUCCESS) || (address_in != address)) && - i++ < 256); + } + + status = dmi_scan(target, &address_in, &value, DMI_OP_NOP, address, 0); if (status != DMI_STATUS_SUCCESS) { LOG_ERROR("failed read from 0x%x; value=0x%" PRIx64 ", status=%d\n", |