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| author | Ben Marshall <ben-marshall@users.noreply.github.com> | 2021-06-04 11:06:34 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-06-04 03:06:34 -0700 |
| commit | 0c8505ccfa2f23bba1009a391f11d59ec1a8f517 (patch) | |
| tree | 2e0a15bb2412adc7ff9052c8cf3135615c65156a | |
| parent | 7d1a0e3153c37cd180be9e95f331f32c225d9257 (diff) | |
| download | riscv-opcodes-0c8505ccfa2f23bba1009a391f11d59ec1a8f517.zip riscv-opcodes-0c8505ccfa2f23bba1009a391f11d59ec1a8f517.tar.gz riscv-opcodes-0c8505ccfa2f23bba1009a391f11d59ec1a8f517.tar.bz2 | |
scalar-crypto: Opcode updates for v0.9.2 (#66)
- Change AES32* and SM4* instructions back to regular R-type encoding.
On branch scalar-crypto-v0.9.2
Changes to be committed:
modified: opcodes-rv32k
modified: opcodes-rv64k
modified: opcodes-rvk
modified: parse_opcodes
| -rw-r--r-- | opcodes-rv32k | 8 | ||||
| -rw-r--r-- | opcodes-rv64k | 2 | ||||
| -rw-r--r-- | opcodes-rvk | 4 | ||||
| -rwxr-xr-x | parse_opcodes | 2 |
4 files changed, 8 insertions, 8 deletions
diff --git a/opcodes-rv32k b/opcodes-rv32k index a9b2402..fb4c876 100644 --- a/opcodes-rv32k +++ b/opcodes-rv32k @@ -6,10 +6,10 @@ # ------------------------------------------------------------ # Scalar AES - RV32 -aes32esmi rt rs2 bs 11..7=0 29..25=0b11011 14..12=0 6..0=0x33 -aes32esi rt rs2 bs 11..7=0 29..25=0b11001 14..12=0 6..0=0x33 -aes32dsmi rt rs2 bs 11..7=0 29..25=0b11111 14..12=0 6..0=0x33 -aes32dsi rt rs2 bs 11..7=0 29..25=0b11101 14..12=0 6..0=0x33 +aes32esmi rd rs1 rs2 bs 29..25=0b11011 14..12=0 6..0=0x33 +aes32esi rd rs1 rs2 bs 29..25=0b11001 14..12=0 6..0=0x33 +aes32dsmi rd rs1 rs2 bs 29..25=0b11111 14..12=0 6..0=0x33 +aes32dsi rd rs1 rs2 bs 29..25=0b11101 14..12=0 6..0=0x33 # Scalar SHA512 - RV32 sha512sum0r rd rs1 rs2 31..30=1 29..25=0b01000 14..12=0 6..0=0x33 diff --git a/opcodes-rv64k b/opcodes-rv64k index 7ad819c..85fac51 100644 --- a/opcodes-rv64k +++ b/opcodes-rv64k @@ -6,7 +6,7 @@ # ------------------------------------------------------------ # Scalar AES - RV64 -aes64ks1i rd rs1 rcon 31..30=0 29..25=0b11000 24=1 14..12=0b001 6..0=0x13 +aes64ks1i rd rs1 rnum 31..30=0 29..25=0b11000 24=1 14..12=0b001 6..0=0x13 aes64im rd rs1 31..30=0 29..25=0b11000 24..20=0b0000 14..12=0b001 6..0=0x13 aes64ks2 rd rs1 rs2 31..30=1 29..25=0b11111 14..12=0b000 6..0=0x33 aes64esm rd rs1 rs2 31..30=0 29..25=0b11011 14..12=0b000 6..0=0x33 diff --git a/opcodes-rvk b/opcodes-rvk index 5773c22..744c807 100644 --- a/opcodes-rvk +++ b/opcodes-rvk @@ -10,8 +10,8 @@ @getnoise rd 19..15=0 31..20=0x7A9 14..12=0 6..0=0b1110011 # Scalar SM4 - RV32, RV64 -sm4ed rt rs2 bs 11..7=0 29..25=0b11000 14..12=0 6..0=0x33 -sm4ks rt rs2 bs 11..7=0 29..25=0b11010 14..12=0 6..0=0x33 +sm4ed rd rs1 rs2 bs 29..25=0b11000 14..12=0 6..0=0x33 +sm4ks rd rs1 rs2 bs 29..25=0b11010 14..12=0 6..0=0x33 # Scalar SM3 - RV32, RV64 sm3p0 rd rs1 31..30=0 29..25=0b01000 24..20=0b01000 14..12=1 6..0=0x13 diff --git a/parse_opcodes b/parse_opcodes index 6205ff5..28c4f05 100755 --- a/parse_opcodes +++ b/parse_opcodes @@ -37,7 +37,7 @@ arglut['zimm'] = (19,15) arglut['shamt'] = (25,20) arglut['shamtw'] = (24,20) arglut['bs'] = (31,30) # byte select for RV32K AES -arglut['rcon'] = (23,20) # round constant for RV64 AES +arglut['rnum'] = (23,20) # round constant for RV64 AES # for vectors arglut['vd'] = (11,7) |