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\chapter{RV32E Base Integer Instruction Set, Version 1.9}
\label{rv32e}
This chapter describes the RV32E base integer instruction set, which
is a reduced version of RV32I designed for embedded systems. The only
change is to reduce the number of integer registers to 16. This
chapter only outlines the differences between RV32E and RV32I, and so
should be read after Chapter~\ref{rv32}.
\begin{commentary}
RV32E was designed to provide an even smaller base core for embedded
microcontrollers. Although we had mentioned this possibility in
version 2.0 of this document, we initially resisted defining this
subset. However, given the demand for the smallest possible 32-bit
microcontroller, and in the interests of preempting fragmentation in
this space, we have now defined RV32E as a fourth standard base ISA in
addition to RV32I, RV64I, and RV128I. There is also interest in
defining an RV64E to reduce context state for highly threaded 64-bit
processors.
\end{commentary}
\section{RV32E Programmers' Model}
RV32E reduces the integer register count to 16 general-purpose
registers, ({\tt x0}--{\tt x15}), where {\tt x0} is a dedicated zero
register.
\begin{commentary}
We have found that in the small RV32I core designs, the upper 16
registers consume around one quarter of the total area of the core
excluding memories, thus their removal saves around 25\% core area
with a corresponding core power reduction.
\end{commentary}
\begin{commentary}
This change requires a different calling convention and ABI. In
particular, RV32E is only used with a soft-float calling convention.
A new embedded ABI is under consideration that would work across RV32E
and RV32I.
\end{commentary}
\section{RV32E Instruction Set}
RV32E uses the same instruction-set encoding as RV32I, except that
only registers {\tt x0}--{\tt x15} are provided. Any future standard
extensions will not make use of the instruction bits freed up by the
reduced register-specifier fields and so these are available for
custom extensions.
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