//

[wavedrom, ,]

....
{reg: [
  {bits: 2, name: 'op',     type: 8, attr: ['2', 'C2', 'C2'],},
  {bits: 5, name: 'rs2',    type: 4, attr: ['5', 'src≠0', 'src≠0'],},
  {bits: 5, name: 'rd/rs1', type: 7, attr: ['5', 'dest≠0', 'dest≠0'],},
  {bits: 4, name: 'funct4', type: 8, attr: ['4', 'C.MV', 'C.ADD'],},
], config: {bits: 16}} 
....