From b2936be90094c9ac4a00711fe424cc9f9bbf90b5 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Mon, 10 Apr 2017 23:34:55 -0700 Subject: Make immediate signs explicit in RVC table Adapted from @DSHorner's #31 --- src/c.tex | 8 ++-- src/rvc-instr-table.tex | 104 ++++++++++++++++++++++++------------------------ 2 files changed, 56 insertions(+), 56 deletions(-) (limited to 'src') diff --git a/src/c.tex b/src/c.tex index 448a072..3d6f689 100644 --- a/src/c.tex +++ b/src/c.tex @@ -748,7 +748,7 @@ format and can target any integer register. \hline 3 & 1 & 5 & 5 & 2 \\ C.LI & imm[5] & dest$\neq$0 & imm[4:0] & C1 \\ -C.LUI & nzimm[17] & $\textrm{dest}{\neq}{\left\{0,2\right\}}$ & nzimm[16:12] & C1 \\ +C.LUI & nzuimm[17] & $\textrm{dest}{\neq}{\left\{0,2\right\}}$ & nzuimm[16:12] & C1 \\ \end{tabular} \end{center} C.LI loads the sign-extended 6-bit immediate, {\em imm}, into @@ -760,7 +760,7 @@ destination register, clears the bottom 12 bits, and sign-extends bit 17 into all higher bits of the destination. C.LUI is only valid when $\textit{rd}{\neq}{\left\{\texttt{x0},\texttt{x2}\right\}}$, and when the immediate is not equal to zero. -C.LUI expands into {\tt lui rd, nzimm[17:12]}. +C.LUI expands into {\tt lui rd, nzuimm[17:12]}. \subsection*{Integer Register-Immediate Operations} @@ -827,7 +827,7 @@ is always 16-byte aligned. \multicolumn{1}{c|}{op} \\ \hline 3 & 8 & 3 & 2 \\ -C.ADDI4SPN & zimm[5:4$\vert$9:6$\vert$2$\vert$3] & dest & C0 \\ +C.ADDI4SPN & nzuimm[5:4$\vert$9:6$\vert$2$\vert$3] & dest & C0 \\ \end{tabular} \end{center} @@ -835,7 +835,7 @@ C.ADDI4SPN is a CIW-format RV32C/RV64C-only instruction that adds a {\em zero}-extended non-zero immediate, scaled by 4, to the stack pointer, {\tt x2}, and writes the result to {\tt rd$'$}. This instruction is used to generate pointers to stack-allocated variables, and expands to -{\tt addi rd$'$, x2, zimm[9:2]}. +{\tt addi rd$'$, x2, nzuimm[9:2]}. \vspace{-0.4in} diff --git a/src/rvc-instr-table.tex b/src/rvc-instr-table.tex index a990587..b74c929 100644 --- a/src/rvc-instr-table.tex +++ b/src/rvc-instr-table.tex @@ -33,52 +33,52 @@ & \multicolumn{3}{|c|}{000} & -\multicolumn{8}{c|}{nzimm[5:4$\vert$9:6$\vert$2$\vert$3]} & +\multicolumn{8}{c|}{nzuimm[5:4$\vert$9:6$\vert$2$\vert$3]} & \multicolumn{3}{c|}{rd$'$} & -\multicolumn{2}{c|}{00} & C.ADDI4SPN {\em \tiny (RES, nzimm=0)} \\ +\multicolumn{2}{c|}{00} & C.ADDI4SPN {\em \tiny (RES, nzuimm=0)} \\ \whline{2-17} & \multicolumn{3}{|c|}{001} & -\multicolumn{3}{c|}{imm[5:3]} & +\multicolumn{3}{c|}{uimm[5:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[7:6]} & +\multicolumn{2}{c|}{uimm[7:6]} & \multicolumn{3}{c|}{rd$'$} & \multicolumn{2}{c|}{00} & C.FLD {\em \tiny (RV32/64)}\\ \cline{2-17} & \multicolumn{3}{|c|}{001} & -\multicolumn{3}{c|}{imm[5:4$\vert$8]} & +\multicolumn{3}{c|}{uimm[5:4$\vert$8]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[7:6]} & +\multicolumn{2}{c|}{uimm[7:6]} & \multicolumn{3}{c|}{rd$'$} & \multicolumn{2}{c|}{00} & C.LQ {\em \tiny (RV128)}\\ \whline{2-17} & \multicolumn{3}{|c|}{010} & -\multicolumn{3}{c|}{imm[5:3]} & +\multicolumn{3}{c|}{uimm[5:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[2$\vert$6]} & +\multicolumn{2}{c|}{uimm[2$\vert$6]} & \multicolumn{3}{c|}{rd$'$} & \multicolumn{2}{c|}{00} & C.LW \\ \whline{2-17} & \multicolumn{3}{|c|}{011} & -\multicolumn{3}{c|}{imm[5:3]} & +\multicolumn{3}{c|}{uimm[5:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[2$\vert$6]} & +\multicolumn{2}{c|}{uimm[2$\vert$6]} & \multicolumn{3}{c|}{rd$'$} & \multicolumn{2}{c|}{00} & C.FLW {\em \tiny (RV32)} \\ \cline{2-17} & \multicolumn{3}{|c|}{011} & -\multicolumn{3}{c|}{imm[5:3]} & +\multicolumn{3}{c|}{uimm[5:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[7:6]} & +\multicolumn{2}{c|}{uimm[7:6]} & \multicolumn{3}{c|}{rd$'$} & \multicolumn{2}{c|}{00} & C.LD {\em \tiny (RV64/128)}\\ \whline{2-17} @@ -91,45 +91,45 @@ & \multicolumn{3}{|c|}{101} & -\multicolumn{3}{c|}{imm[5:3]} & +\multicolumn{3}{c|}{uimm[5:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[7:6]} & +\multicolumn{2}{c|}{uimm[7:6]} & \multicolumn{3}{c|}{rs2$'$} & \multicolumn{2}{c|}{00} & C.FSD {\em \tiny (RV32/64)}\\ \cline{2-17} & \multicolumn{3}{|c|}{101} & -\multicolumn{3}{c|}{imm[5:4$\vert$8]} & +\multicolumn{3}{c|}{uimm[5:4$\vert$8]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[7:6]} & +\multicolumn{2}{c|}{uimm[7:6]} & \multicolumn{3}{c|}{rs2$'$} & \multicolumn{2}{c|}{00} & C.SQ {\em \tiny (RV128)}\\ \whline{2-17} & \multicolumn{3}{|c|}{110} & -\multicolumn{3}{c|}{imm[5:3]} & +\multicolumn{3}{c|}{uimm[5:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[2$\vert$6]} & +\multicolumn{2}{c|}{uimm[2$\vert$6]} & \multicolumn{3}{c|}{rs2$'$} & \multicolumn{2}{c|}{00} & C.SW \\ \whline{2-17} & \multicolumn{3}{|c|}{111} & -\multicolumn{3}{c|}{imm[5:3]} & +\multicolumn{3}{c|}{uimm[5:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[2$\vert$6]} & +\multicolumn{2}{c|}{uimm[2$\vert$6]} & \multicolumn{3}{c|}{rs2$'$} & \multicolumn{2}{c|}{00} & C.FSW {\em \tiny (RV32)} \\ \cline{2-17} & \multicolumn{3}{|c|}{111} & -\multicolumn{3}{c|}{imm[5:3]} & +\multicolumn{3}{c|}{uimm[5:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{2}{c|}{imm[7:6]} & +\multicolumn{2}{c|}{uimm[7:6]} & \multicolumn{3}{c|}{rs2$'$} & \multicolumn{2}{c|}{00} & C.SD {\em \tiny (RV64/128)}\\ \cline{2-17} @@ -183,7 +183,7 @@ & \multicolumn{3}{|c|}{001} & -\multicolumn{11}{c|}{offset[11$\vert$4$\vert$9:8$\vert$10$\vert$6$\vert$7$\vert$3:1$\vert$5]} & +\multicolumn{11}{c|}{imm[11$\vert$4$\vert$9:8$\vert$10$\vert$6$\vert$7$\vert$3:1$\vert$5]} & \multicolumn{2}{c|}{01} & C.JAL {\em \tiny (RV32)} \\ \cline{2-17} @@ -221,11 +221,11 @@ & \multicolumn{3}{|c|}{100} & -\multicolumn{1}{c|}{nzimm[5]} & +\multicolumn{1}{c|}{nzuimm[5]} & \multicolumn{2}{c|}{00} & \multicolumn{3}{c|}{rs1$'$/rd$'$} & -\multicolumn{5}{c|}{nzimm[4:0]} & -\multicolumn{2}{c|}{01} & C.SRLI {\em \tiny (RV32 NSE, nzimm[5]=1)} \\ +\multicolumn{5}{c|}{nzuimm[4:0]} & +\multicolumn{2}{c|}{01} & C.SRLI {\em \tiny (RV32 NSE, nzuimm[5]=1)} \\ \cline{2-17} & @@ -239,11 +239,11 @@ & \multicolumn{3}{|c|}{100} & -\multicolumn{1}{c|}{nzimm[5]} & +\multicolumn{1}{c|}{nzuimm[5]} & \multicolumn{2}{c|}{01} & \multicolumn{3}{c|}{rs1$'$/rd$'$} & -\multicolumn{5}{c|}{nzimm[4:0]} & -\multicolumn{2}{c|}{01} & C.SRAI {\em \tiny (RV32 NSE, nzimm[5]=1)} \\ +\multicolumn{5}{c|}{nzuimm[4:0]} & +\multicolumn{2}{c|}{01} & C.SRAI {\em \tiny (RV32 NSE, nzuimm[5]=1)} \\ \cline{2-17} & @@ -346,23 +346,23 @@ & \multicolumn{3}{|c|}{101} & -\multicolumn{11}{c|}{offset[11$\vert$4$\vert$9:8$\vert$10$\vert$6$\vert$7$\vert$3:1$\vert$5]} & +\multicolumn{11}{c|}{imm[11$\vert$4$\vert$9:8$\vert$10$\vert$6$\vert$7$\vert$3:1$\vert$5]} & \multicolumn{2}{c|}{01} & C.J \\ \whline{2-17} & \multicolumn{3}{|c|}{110} & -\multicolumn{3}{c|}{offset[8$\vert$4:3]} & +\multicolumn{3}{c|}{imm[8$\vert$4:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{5}{c|}{offset[7:6$\vert$2:1$\vert$5]} & +\multicolumn{5}{c|}{imm[7:6$\vert$2:1$\vert$5]} & \multicolumn{2}{c|}{01} & C.BEQZ \\ \whline{2-17} & \multicolumn{3}{|c|}{111} & -\multicolumn{3}{c|}{offset[8$\vert$4:3]} & +\multicolumn{3}{c|}{imm[8$\vert$4:3]} & \multicolumn{3}{c|}{rs1$'$} & -\multicolumn{5}{c|}{offset[7:6$\vert$2:1$\vert$5]} & +\multicolumn{5}{c|}{imm[7:6$\vert$2:1$\vert$5]} & \multicolumn{2}{c|}{01} & C.BNEZ \\ \cline{2-17} @@ -400,10 +400,10 @@ & \multicolumn{3}{|c|}{000} & -\multicolumn{1}{c|}{nzimm[5]} & +\multicolumn{1}{c|}{nzuimm[5]} & \multicolumn{5}{c|}{rs1/rd$\neq$0} & -\multicolumn{5}{c|}{nzimm[4:0]} & -\multicolumn{2}{c|}{10} & C.SLLI {\em \tiny (HINT, rd=0; RV32 NSE, nzimm[5]=1)} \\ +\multicolumn{5}{c|}{nzuimm[4:0]} & +\multicolumn{2}{c|}{10} & C.SLLI {\em \tiny (HINT, rd=0; RV32 NSE, nzuimm[5]=1)} \\ \cline{2-17} & @@ -416,41 +416,41 @@ & \multicolumn{3}{|c|}{001} & -\multicolumn{1}{c|}{imm[5]} & +\multicolumn{1}{c|}{uimm[5]} & \multicolumn{5}{c|}{rd} & -\multicolumn{5}{c|}{imm[4:3$\vert$8:6]} & +\multicolumn{5}{c|}{uimm[4:3$\vert$8:6]} & \multicolumn{2}{c|}{10} & C.FLDSP {\em \tiny (RV32/64)} \\ \cline{2-17} & \multicolumn{3}{|c|}{001} & -\multicolumn{1}{c|}{imm[5]} & +\multicolumn{1}{c|}{uimm[5]} & \multicolumn{5}{c|}{rd$\neq$0} & -\multicolumn{5}{c|}{imm[4$\vert$9:6]} & +\multicolumn{5}{c|}{uimm[4$\vert$9:6]} & \multicolumn{2}{c|}{10} & C.LQSP {\em \tiny (RV128; RES, rd=0)} \\ \whline{2-17} & \multicolumn{3}{|c|}{010} & -\multicolumn{1}{c|}{imm[5]} & +\multicolumn{1}{c|}{uimm[5]} & \multicolumn{5}{c|}{rd$\neq$0} & -\multicolumn{5}{c|}{imm[4:2$\vert$7:6]} & +\multicolumn{5}{c|}{uimm[4:2$\vert$7:6]} & \multicolumn{2}{c|}{10} & C.LWSP {\em \tiny (RES, rd=0)} \\ \whline{2-17} & \multicolumn{3}{|c|}{011} & -\multicolumn{1}{c|}{imm[5]} & +\multicolumn{1}{c|}{uimm[5]} & \multicolumn{5}{c|}{rd} & -\multicolumn{5}{c|}{imm[4:2$\vert$7:6]} & +\multicolumn{5}{c|}{uimm[4:2$\vert$7:6]} & \multicolumn{2}{c|}{10} & C.FLWSP {\em \tiny (RV32)} \\ \cline{2-17} & \multicolumn{3}{|c|}{011} & -\multicolumn{1}{c|}{imm[5]} & +\multicolumn{1}{c|}{uimm[5]} & \multicolumn{5}{c|}{rd$\neq$0} & -\multicolumn{5}{c|}{imm[4:3$\vert$8:6]} & +\multicolumn{5}{c|}{uimm[4:3$\vert$8:6]} & \multicolumn{2}{c|}{10} & C.LDSP {\em \tiny (RV64/128; RES, rd=0)} \\ \whline{2-17} @@ -496,35 +496,35 @@ & \multicolumn{3}{|c|}{101} & -\multicolumn{6}{c|}{imm[5:3$\vert$8:6]} & +\multicolumn{6}{c|}{uimm[5:3$\vert$8:6]} & \multicolumn{5}{c|}{rs2} & \multicolumn{2}{c|}{10} & C.FSDSP {\em \tiny (RV32/64)}\\ \cline{2-17} & \multicolumn{3}{|c|}{101} & -\multicolumn{6}{c|}{imm[5:4$\vert$9:6]} & +\multicolumn{6}{c|}{uimm[5:4$\vert$9:6]} & \multicolumn{5}{c|}{rs2} & \multicolumn{2}{c|}{10} & C.SQSP {\em \tiny (RV128)}\\ \whline{2-17} & \multicolumn{3}{|c|}{110} & -\multicolumn{6}{c|}{imm[5:2$\vert$7:6]} & +\multicolumn{6}{c|}{uimm[5:2$\vert$7:6]} & \multicolumn{5}{c|}{rs2} & \multicolumn{2}{c|}{10} & C.SWSP \\ \whline{2-17} & \multicolumn{3}{|c|}{111} & -\multicolumn{6}{c|}{imm[5:2$\vert$7:6]} & +\multicolumn{6}{c|}{uimm[5:2$\vert$7:6]} & \multicolumn{5}{c|}{rs2} & \multicolumn{2}{c|}{10} & C.FSWSP {\em \tiny (RV32)} \\ \cline{2-17} & \multicolumn{3}{|c|}{111} & -\multicolumn{6}{c|}{imm[5:3$\vert$8:6]} & +\multicolumn{6}{c|}{uimm[5:3$\vert$8:6]} & \multicolumn{5}{c|}{rs2} & \multicolumn{2}{c|}{10} & C.SDSP {\em \tiny (RV64/128)}\\ \cline{2-17} -- cgit v1.1