From 6522d66574df148356a6227f6fd45f8f4a2a8ca6 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Mon, 24 Jun 2019 22:33:43 -0700
Subject: Remove endianness dependence on PTE.U

---
 src/machine.tex    | 23 ++++-------------------
 src/supervisor.tex | 19 +++++--------------
 2 files changed, 9 insertions(+), 33 deletions(-)

(limited to 'src')

diff --git a/src/machine.tex b/src/machine.tex
index 8e3282e..2c8f6e7 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -736,21 +736,12 @@ M-mode (assuming {\tt mstatus}.MPRV=0) are little-endian (MBE=0) or
 big-endian (MBE=1).
 
 If S-mode is not supported, SBE is hardwired to~0.
-Otherwise, when address translation is not active, SBE controls whether
-explicit load and store memory accesses made from S-mode are
-little-endian (SBE=0) or big-endian (SBE=1).
-When page-based address translation is active, SBE controls whether
-explicit memory accesses to non-U-mode-accessible pages (U=0 in
-Figure~\ref{sv32pte}) are little-endian or big-endian.
+Otherwise, SBE controls whether explicit load and store memory accesses made
+from S-mode are little-endian (SBE=0) or big-endian (SBE=1).
 
 If U-mode is not supported, UBE is hardwired to~0.
-Otherwise, when address translation is not active, UBE controls whether
-explicit load and store memory accesses made from U-mode are
-little-endian (UBE=0) or big-endian (UBE=1).
-When page-based address translation is active, UBE controls whether
-explicit memory accesses to U-mode-accessible pages (U=1 in
-Figure~\ref{sv32pte}) are little-endian or big-endian, including explicit
-accesses to such pages made from S-mode with {\tt sstatus}.SUM=1.
+Otherwise, UBE controls whether explicit load and store memory accesses made
+from U-mode are little-endian (UBE=0) or big-endian (UBE=1).
 
 For {\em implicit} accesses to supervisor-level memory management data
 structures, such as page tables, endianness is always controlled by SBE.
@@ -800,12 +791,6 @@ opposite endianness.
 Consideration has been given also to the possibility of nonstandard
 usages whereby software flips the endianness of memory accesses as
 needed.
-
-When page-based address translation is active, pages that are accessible
-to user mode have endianness determined by UBE, even if the access is
-made from S-mode (with {\tt sstatus}.SUM=1).
-Pages that are not accessible to user mode have endianness determined by
-SBE.
 \end{commentary}
 
 \begin{commentary}
diff --git a/src/supervisor.tex b/src/supervisor.tex
index 29afbca..4173456 100644
--- a/src/supervisor.tex
+++ b/src/supervisor.tex
@@ -250,21 +250,17 @@ alternate mapping.
 \subsection{Endianness Control in {\tt sstatus} Register}
 
 The UBE bit is a \warl\ field that controls the endianness of explicit
-memory accesses for U-mode, which may differ from the endianness of
+memory accesses made from U-mode, which may differ from the endianness of
 memory accesses in S-mode.
 An implementation may hardwire UBE to specify always the same endianness
 as for S-mode.
 
-UBE has no effect on instruction fetches, which are {\em implicit} memory
-accesses that are always little-endian.
-
-When address translation is not active, UBE controls whether explicit
+UBE controls whether explicit
 load and store memory accesses made from U-mode are little-endian (UBE=0)
 or big-endian (UBE=1).
-When page-based address translation is active, UBE controls whether
-explicit memory accesses to U-mode-accessible pages (U=1 in
-Figure~\ref{sv32pte}) are little-endian or big-endian, including explicit
-accesses to such pages made from S-mode with SUM=1.
+
+UBE has no effect on instruction fetches, which are {\em implicit} memory
+accesses that are always little-endian.
 
 For {\em implicit} accesses to supervisor-level memory management data
 structures, such as page tables, S-mode endianness always applies and UBE
@@ -276,11 +272,6 @@ big-endian-only, with no accommodation for mixing endianness.
 Nevertheless, endianness control has been defined so as to permit an
 OS of one endianness to execute user-mode programs of the opposite
 endianness.
-
-When page-based address translation is active, pages that are accessible
-to user mode have endianness determined by UBE, even if the access is
-made from S-mode (with SUM=1).
-For pages that are not accessible to user mode, UBE is ignored.
 \end{commentary}
 
 \subsection{Supervisor Trap Vector Base Address Register ({\tt stvec})}
-- 
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