From 45cddfbe9866ce65b02190ac1ea975bd1259c8b3 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Tue, 19 Sep 2023 17:13:47 -0700
Subject: Hyphenate "virtual-/illegal-instruction exception" (#1133)

---
 src/supervisor.adoc | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

(limited to 'src/supervisor.adoc')

diff --git a/src/supervisor.adoc b/src/supervisor.adoc
index 8e66a26..f0c774d 100644
--- a/src/supervisor.adoc
+++ b/src/supervisor.adoc
@@ -338,7 +338,7 @@ counters to U-mode.
 
 When the CY, TM, IR, or HPM__n__ bit in the `scounteren` register is
 clear, attempts to read the `cycle`, `time`, `instret`, or `hpmcountern`
-register while executing in U-mode will cause an illegal instruction
+register while executing in U-mode will cause an illegal-instruction
 exception. When one of these bits is set, access to the corresponding
 register is permitted.
 
@@ -536,16 +536,16 @@ address of the portion of the instruction that caused the fault, while
 `sepc` will point to the beginning of the instruction.
 
 The `stval` register can optionally also be used to return the faulting
-instruction bits on an illegal instruction exception (`sepc` points to
+instruction bits on an illegal-instruction exception (`sepc` points to
 the faulting instruction in memory). If `stval` is written with a
-nonzero value when an illegal instruction exception occurs, then `stval`
+nonzero value when an illegal-instruction exception occurs, then `stval`
 will contain the shortest of:
 
 * the actual faulting instruction
 * the first ILEN bits of the faulting instruction
 * the first SXLEN bits of the faulting instruction
 
-The value loaded into `stval` on an illegal instruction exception is
+The value loaded into `stval` on an illegal-instruction exception is
 right-justified and all unused upper bits are cleared to zero.
 
 For other traps, `stval` is set to zero, but a future standard may
@@ -1031,8 +1031,8 @@ attractive for its simplicity and possibly better scalability.
 ====
 
 For implementations that make `satp`.MODE read-only zero (always Bare),
-attempts to execute an SFENCE.VMA instruction might raise an illegal
-instruction exception.
+attempts to execute an SFENCE.VMA instruction might raise an
+illegal-instruction exception.
 
 [[sv32]]
 === Sv32: Page-Based 32-bit Virtual-Memory Systems
@@ -1935,12 +1935,12 @@ HINVAL.GVMA uses VMIDs instead of ASIDs.
 SINVAL.VMA, HINVAL.VVMA, and HINVAL.GVMA require the same permissions
 and raise the same exceptions as SFENCE.VMA, HFENCE.VVMA, and
 HFENCE.GVMA, respectively. In particular, an attempt to execute any of
-these instructions in U-mode always raises an illegal instruction
+these instructions in U-mode always raises an illegal-instruction
 exception, and an attempt to execute SINVAL.VMA or HINVAL.GVMA in S-mode
-or HS-mode when `mstatus`.TVM=1 also raises an illegal instruction
+or HS-mode when `mstatus`.TVM=1 also raises an illegal-instruction
 exception. An attempt to execute HINVAL.VVMA or HINVAL.GVMA in VS-mode
-or VU-mode, or to execute SINVAL.VMA in VU-mode, raises a virtual
-instruction exception. When `hstatus`.VTVM=1, an attempt to execute
+or VU-mode, or to execute SINVAL.VMA in VU-mode, raises a
+virtual-instruction exception. When `hstatus`.VTVM=1, an attempt to execute
 SINVAL.VMA in VS-mode also raises a virtual instruction exception.
 
 [NOTE]
-- 
cgit v1.1

