From 64353b3717c9d387759c61d16d3984760a028046 Mon Sep 17 00:00:00 2001 From: elisa Date: Fri, 10 Sep 2021 14:07:18 -0700 Subject: adding converted adoc files --- src/q-st-ext.adoc | 148 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 148 insertions(+) create mode 100644 src/q-st-ext.adoc (limited to 'src/q-st-ext.adoc') diff --git a/src/q-st-ext.adoc b/src/q-st-ext.adoc new file mode 100644 index 0000000..02122b7 --- /dev/null +++ b/src/q-st-ext.adoc @@ -0,0 +1,148 @@ +== `Q` Standard Extension for Quad-Precision Floating-Point, Version 2.2 + +This chapter describes the Q standard extension for 128-bit +quad-precision binary floating-point instructions compliant with the +IEEE 754-2008 arithmetic standard. The quad-precision binary +floating-point instruction-set extension is named `Q`; it depends on +the double-precision floating-point extension D. The floating-point +registers are now extended to hold either a single, double, or +quad-precision floating-point value (FLEN=128). The NaN-boxing scheme +described in <> is now extended +recursively to allow a single-precision value to be NaN-boxed inside a +double-precision value which is itself NaN-boxed inside a quad-precision +value. + +=== Quad-Precision Load and Store Instructions + +New 128-bit variants of LOAD-FP and STORE-FP instructions are added, +encoded with a new value for the funct3 width field. + +M@R@F@R@O + +& & & & + +& & & & + +& 5 & 3 & 5 & 7 + +offset[11:0] & base & Q & dest & LOAD-FP + + +O@R@R@F@R@O + +& & & & & + +& & & & & + +& 5 & 5 & 3 & 5 & 7 + +offset[11:5] & src & base & Q & offset[4:0] & STORE-FP + + +FLQ and FSQ are only guaranteed to execute atomically if the effective +address is naturally aligned and XLEN=128. + +FLQ and FSQ do not modify the bits being transferred; in particular, the +payloads of non-canonical NaNs are preserved. + +=== Quad-Precision Computational Instructions + +A new supported format is added to the format field of most +instructions, as shown in <> + +[[fpextfmt]] +.Format field encoding. +[cols="^,^,<",options="header",] +|=== +|_fmt_ field |Mnemonic |Meaning +|00 |S |32-bit single-precision +|01 |D |64-bit double-precision +|10 |H |16-bit half-precision +|11 |Q |128-bit quad-precision +|=== + +The quad-precision floating-point computational instructions are defined +analogously to their double-precision counterparts, but operate on +quad-precision operands and produce quad-precision results. + +R@F@R@R@F@R@O + +& & & & & & + +& & & & & & + +& 2 & 5 & 5 & 3 & 5 & 7 + +FADD/FSUB & Q & src2 & src1 & RM & dest & OP-FP + +FMUL/FDIV & Q & src2 & src1 & RM & dest & OP-FP + +FMIN-MAX & Q & src2 & src1 & MIN/MAX & dest & OP-FP + +FSQRT & Q & 0 & src & RM & dest & OP-FP + + +R@F@R@R@F@R@O + +& & & & & & + +& & & & & & + +& 2 & 5 & 5 & 3 & 5 & 7 + +src3 & Q & src2 & src1 & RM & dest & F[N]MADD/F[N]MSUB + + +=== Quad-Precision Convert and Move Instructions + +New floating-point-to-integer and integer-to-floating-point conversion +instructions are added. These instructions are defined analogously to +the double-precision-to-integer and integer-to-double-precision +conversion instructions. FCVT.W.Q or FCVT.L.Q converts a quad-precision +floating-point number to a signed 32-bit or 64-bit integer, +respectively. FCVT.Q.W or FCVT.Q.L converts a 32-bit or 64-bit signed +integer, respectively, into a quad-precision floating-point number. +FCVT.WU.Q, FCVT.LU.Q, FCVT.Q.WU, and FCVT.Q.LU variants convert to or +from unsigned integer values. FCVT.L[U].Q and FCVT.Q.L[U] are RV64-only +instructions. + +R@F@R@R@F@R@O + +& & & & & & + +& & & & & & + +& 2 & 5 & 5 & 3 & 5 & 7 + +FCVT._int_.Q & Q & W[U]/L[U] & src & RM & dest & OP-FP + +FCVT.Q._int_ & Q & W[U]/L[U] & src & RM & dest & OP-FP + + +New floating-point-to-floating-point conversion instructions are added. +These instructions are defined analogously to the double-precision +floating-point-to-floating-point conversion instructions. FCVT.S.Q or +FCVT.Q.S converts a quad-precision floating-point number to a +single-precision floating-point number, or vice-versa, respectively. +FCVT.D.Q or FCVT.Q.D converts a quad-precision floating-point number to +a double-precision floating-point number, or vice-versa, respectively. + +R@F@R@R@F@R@O + +& & & & & & + +& & & & & & + +& 2 & 5 & 5 & 3 & 5 & 7 + +FCVT.S.Q & S & Q & src & RM & dest & OP-FP + +FCVT.Q.S & Q & S & src & RM & dest & OP-FP + +FCVT.D.Q & D & Q & src & RM & dest & OP-FP + +FCVT.Q.D & Q & D & src & RM & dest & OP-FP + + +Floating-point to floating-point sign-injection instructions, FSGNJ.Q, +FSGNJN.Q, and FSGNJX.Q are defined analogously to the double-precision +sign-injection instruction. + +R@F@R@R@F@R@O + +& & & & & & + +& & & & & & + +& 2 & 5 & 5 & 3 & 5 & 7 + +FSGNJ & Q & src2 & src1 & J[N]/JX & dest & OP-FP + + +FMV.X.Q and FMV.Q.X instructions are not provided in RV32 or RV64, so +quad-precision bit patterns must be moved to the integer registers via +memory. + +RV128 will support FMV.X.Q and FMV.Q.X in the Q extension. + +=== Quad-Precision Floating-Point Compare Instructions + +The quad-precision floating-point compare instructions are defined +analogously to their double-precision counterparts, but operate on +quad-precision operands. + +S@F@R@R@F@R@O + +& & & & & & + +& & & & & & + +& 2 & 5 & 5 & 3 & 5 & 7 + +FCMP & Q & src2 & src1 & EQ/LT/LE & dest & OP-FP + + +=== Quad-Precision Floating-Point Classify Instruction + +The quad-precision floating-point classify instruction, FCLASS.Q, is +defined analogously to its double-precision counterpart, but operates on +quad-precision operands. + +S@F@R@R@F@R@O + +& & & & & & + +& & & & & & + +& 2 & 5 & 5 & 3 & 5 & 7 + +FCLASS & Q & 0 & src & 001 & dest & OP-FP + -- cgit v1.1