From 9c8b8f36b31c3cefdb6b57f5073b374c17196def Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Wed, 13 Jan 2021 15:15:33 -0800 Subject: Add preface note that N extension was moved to its own chapter --- src/priv-preface.tex | 1 + 1 file changed, 1 insertion(+) (limited to 'src/priv-preface.tex') diff --git a/src/priv-preface.tex b/src/priv-preface.tex index 69627ab..f8b0642 100644 --- a/src/priv-preface.tex +++ b/src/priv-preface.tex @@ -51,6 +51,7 @@ Additionally, the following compatible changes have been made since version \begin{itemize} \parskip 0pt \itemsep 1pt +\item Moved N extension into its own chapter. \item Defined the RV32-only CSR {\tt mstatush}, which contains most of the same fields as the upper 32 bits of RV64's {\tt mstatus}. \item Permitted the unconditional delegation of less-privileged interrupts. -- cgit v1.1 From 0ca4c684008f655c6c5b8933a82789f2fc069139 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Wed, 10 Feb 2021 23:27:28 -0800 Subject: Update preface Forgot to do so as part of #601. --- src/priv-preface.tex | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/priv-preface.tex') diff --git a/src/priv-preface.tex b/src/priv-preface.tex index f8b0642..6d82d19 100644 --- a/src/priv-preface.tex +++ b/src/priv-preface.tex @@ -61,6 +61,8 @@ Additionally, the following compatible changes have been made since version and access-fault exceptions. \item PMP reset values are now platform-defined. \item An additional 48 optional PMP registers have been defined. +\item Software breakpoint exceptions are permitted to write either 0 + or the PC to {\em x}\/{\tt tval}. \end{itemize} Finally, the hypervisor architecture proposal has been extensively revised. -- cgit v1.1 From 0453d462a180927169656e6e3f7faf3042b23e5b Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Fri, 5 Mar 2021 00:00:20 -0800 Subject: fix typo in preface --- src/priv-preface.tex | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/priv-preface.tex') diff --git a/src/priv-preface.tex b/src/priv-preface.tex index 6d82d19..d33ffcd 100644 --- a/src/priv-preface.tex +++ b/src/priv-preface.tex @@ -110,7 +110,7 @@ Changes from version 1.10 include: \item SFENCE.VMA semantics have been clarified. \item Made the {\tt mstatus}.MPP field \warl, rather than \wlrl. \item Made the unused {\em x}{\tt ip} fields \wpri, rather than \wiri. -\item Made the unused {\tt misa} fields \wlrl, rather than \wiri. +\item Made the unused {\tt misa} fields \warl, rather than \wiri. \item Made the unused {\tt pmpaddr} and {\tt pmpcfg} fields \warl, rather than \wiri. \item Required all harts in a system to employ the same PTE-update scheme as each other. \item Rectified an editing error that misdescribed the mechanism by which -- cgit v1.1 From d001320faf6937274b0dda4df2d7a4aaf4cfb5d4 Mon Sep 17 00:00:00 2001 From: Daniel Lustig Date: Wed, 2 Jun 2021 09:33:25 -0400 Subject: Remove the "C" bit, per virt mem TG vote We may choose to re-add "C" later, but for now it was decided that reserving a bit for "C" was premature. Also: Fix Sv57, which somehow still had a four-level PPN diagram Fix a sentence saying that setting PTE reserved bits should trigger an access fault. Any incorrect use of PTEs should be a page fault. --- src/priv-preface.tex | 1 - 1 file changed, 1 deletion(-) (limited to 'src/priv-preface.tex') diff --git a/src/priv-preface.tex b/src/priv-preface.tex index e3511fa..622647a 100644 --- a/src/priv-preface.tex +++ b/src/priv-preface.tex @@ -63,7 +63,6 @@ Additionally, the following compatible changes have been made since version and access-fault exceptions. \item PMP reset values are now platform-defined. \item An additional 48 optional PMP registers have been defined. -\item Added the C bit to Sv39 and Sv48 PTEs to indicate custom encodings. \item Described the behavior of address-translation caches a little more explicitly. \item Slightly relaxed the atomicity requirement for A and D bit updates -- cgit v1.1