From d88c7d1931c6a5987894013f514429b82877a027 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Mon, 29 Jan 2024 23:17:17 -0800
Subject: Reorder changelog

---
 src/priv-preface.adoc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/priv-preface.adoc')

diff --git a/src/priv-preface.adoc b/src/priv-preface.adoc
index 3c481bf..4591c9f 100644
--- a/src/priv-preface.adoc
+++ b/src/priv-preface.adoc
@@ -47,6 +47,7 @@ implemented.
 * Defined the RV32-only `medelegh` and `hedelegh` CSRs.
 * Defined the misaligned atomicity granule PMA.
 * Reserved interrupt 13 for forthcoming counter-overflow interrupt extension.
+* Defined hardware error and software check exception codes.
 * Specified synchronization requirements when changing the PBMTE fields
 in `menvcfg` and `henvcfg`.
 * Clarified that "platform- or custom-use" interrupts are actually
@@ -60,7 +61,6 @@ in `menvcfg` and `henvcfg`.
 * Clarified that, for a given exception cause, `__x__tval` might sometimes
 be set to a nonzero value but sometimes not.
 * Clarified exception behavior of unimplemented or inaccessible CSRs.
-* Defined hardware error and software check exception codes.
 
 [.big]*_Preface to Version 20211203_*
 
-- 
cgit v1.1

