From 42f3c82d1a669004e0ccdd5eb6b8fa90d358141a Mon Sep 17 00:00:00 2001 From: Krste Asanovic Date: Mon, 6 Aug 2018 00:59:38 -0700 Subject: Cleaned up RV64 chapter to remove platform-specific mandates. --- src/preface.tex | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/preface.tex') diff --git a/src/preface.tex b/src/preface.tex index dd37bd5..ad1681d 100644 --- a/src/preface.tex +++ b/src/preface.tex @@ -61,6 +61,13 @@ The major changes in this version of the document include: environment interfaces rather then just mandating invisible handling of misaligned loads and stores in user mode. This behavior was already needed for definition of classic privileged architecture. +\item FENCE.TSO instruction extension added. +\item Removed prohibitions on using RV32E with other extensions. +\item Removed platform-specific mandates that certain encodings + produced illegal instruction exceptions in RV32E and RV64I chapters. +\item Counter/timer instructions are now not considered part of + mandatory base ISA, and so CSR instructions were moved into separate + chapter. \item Defined the signed-zero behavior of FMIN.{\em fmt} and FMAX.{\em fmt}, and changed their behavior on signaling-NaN inputs to conform to the minimumNumber and maximumNumber operations in the proposed IEEE 754-201x -- cgit v1.1