From bf33d5feb1290448e97fb5bf395c813923573068 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Mon, 10 Dec 2018 12:21:03 -0800 Subject: subset -> extension --- src/p.tex | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/p.tex') diff --git a/src/p.tex b/src/p.tex index b360294..074e475 100644 --- a/src/p.tex +++ b/src/p.tex @@ -12,7 +12,7 @@ \end{commentary} In this chapter, we outline a standard packed-SIMD extension for -RISC-V. We've reserved the instruction subset name ``P'' for a future +RISC-V. We've reserved the instruction-set extension name ``P'' for a future standard set of packed-SIMD extensions. Many other extensions can build upon a packed-SIMD extension, taking advantage of the wide data registers and datapaths separate from the integer unit. @@ -39,8 +39,8 @@ architectures are a better choice and should use the V extension. A RISC-V packed-SIMD extension reuses the floating-point registers ({\tt f0}-{\tt f31}). These registers can be defined to have widths -of FLEN=32 to FLEN=1024. The standard floating-point instruction -subsets require registers of width 32 bits (``F''), 64 bits (``D''), +of FLEN=32 to FLEN=1024. The standard floating-point instruction-set +extensions require registers of width 32 bits (``F''), 64 bits (``D''), or 128 bits (``Q''). \begin{commentary} -- cgit v1.1