From 9f7f7083b0e6a546430f34da339f07a919f64164 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Wed, 1 Sep 2021 13:45:40 -0700
Subject: FIOM may optionally not exist in M/U systems

---
 src/machine.tex | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/machine.tex')

diff --git a/src/machine.tex b/src/machine.tex
index 5280156..f4ef940 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -2357,6 +2357,8 @@ if an atomic instruction that accesses a region ordered as device I/O
 has its {\em aq} and/or {\em rl} bit set, then that instruction is ordered
 as though it accesses both device I/O and memory.
 
+If S-mode is not supported, implementations may hardwire FIOM to zero.
+
 \begin{table}[h!]
 \begin{center}
 \begin{tabular}{|c|l|}
-- 
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