From 5e8d2db74b524d47e68fd03fbe07d5768b25f018 Mon Sep 17 00:00:00 2001 From: Daniel Lustig Date: Tue, 2 Nov 2021 11:12:57 -0400 Subject: Add the Svinval standard extension --- src/machine.tex | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/machine.tex') diff --git a/src/machine.tex b/src/machine.tex index 1453b2e..e415f95 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -815,8 +815,8 @@ example by swapping byte order after loads and before stores. The TVM (Trap Virtual Memory) bit is a \warl\ field that supports intercepting supervisor virtual-memory management operations. When TVM=1, -attempts to read or write the {\tt satp} CSR or execute the SFENCE.VMA -instruction while executing in S-mode will raise an illegal instruction +attempts to read or write the {\tt satp} CSR or execute an SFENCE.VMA or +SINVAL.VMA instruction while executing in S-mode will raise an illegal instruction exception. When TVM=0, these operations are permitted in S-mode. TVM is hard-wired to 0 when S-mode is not supported. @@ -826,8 +826,8 @@ operating systems to execute in S-mode, rather than classically virtualizing them in U-mode. This approach obviates the need to trap accesses to most S-mode CSRs. -Trapping {\tt satp} accesses and the SFENCE.VMA instruction provides the -hooks necessary to lazily populate shadow page tables. +Trapping {\tt satp} accesses and the SFENCE.VMA and SINVAL.VMA instructions +provides the hooks necessary to lazily populate shadow page tables. \end{commentary} The TW (Timeout Wait) bit is a \warl\ field that supports intercepting the WFI -- cgit v1.1