From cac9ad6fedf57a0cff22caa5e9b8252a7290cb5d Mon Sep 17 00:00:00 2001 From: Krste Asanovic Date: Sun, 26 Aug 2018 16:51:28 -0700 Subject: Clarified description of CSR writes to counters per Nikhil's suggestion. --- src/csr.tex | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/src/csr.tex b/src/csr.tex index 1d02710..932b450 100644 --- a/src/csr.tex +++ b/src/csr.tex @@ -93,14 +93,13 @@ CSRRWI, if {\em rd}={\tt x0}, then the instruction shall not read the CSR and shall not cause any of the side-effects that might occur on a CSR read. -Some CSRs, such as the instructions retired counter, {\tt instret}, may be -modified as side effects of instruction execution. In these cases, if a CSR -access instruction reads a CSR, it reads the value prior to the execution of -the instruction. If a CSR access instruction writes a CSR, the update occurs -after the execution of the instruction. In particular, a value written to -{\tt instret} by one instruction will be the value read by the following -instruction (i.e., the increment of {\tt instret} caused by the first -instruction retiring happens before the write of the new value). +Some CSRs, such as the instructions-retired counter, {\tt instret}, +may be modified as side effects of instruction execution. In these +cases, if a CSR access instruction reads a CSR, it reads the value +prior to the execution of the instruction. If a CSR access +instruction writes such a CSR, the write is done instead of the +increment. In particular, a value written to {\tt instret} by one +instruction will be the value read by the following instruction. The assembler pseudoinstruction to read a CSR, CSRR {\em rd, csr}, is encoded as CSRRS {\em rd, csr, x0}. The assembler pseudoinstruction -- cgit v1.1