From 8088ba478136a25e864a34c5467941c68f104509 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Mon, 27 Jul 2020 14:25:26 -0700 Subject: Clarify effect on unwritten bits for CSRRS/CSRRC They aren't _explicitly_ written, but that doesn't mean they are unaffected, since they could change as a result of the bits that are written. Resolves #549 --- src/csr.tex | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/csr.tex b/src/csr.tex index b1b7336..a72553c 100644 --- a/src/csr.tex +++ b/src/csr.tex @@ -63,16 +63,15 @@ to integer register {\em rd}. The initial value in integer register {\em rs1} is treated as a bit mask that specifies bit positions to be set in the CSR. Any bit that is high in {\em rs1} will cause the corresponding bit to be set in the CSR, if that CSR bit is writable. -Other bits in the CSR are unaffected (though CSRs might have side -effects when written). +Other bits in the CSR are not explicitly written. The CSRRC (Atomic Read and Clear Bits in CSR) instruction reads the value of the CSR, zero-extends the value to XLEN bits, and writes it to integer register {\em rd}. The initial value in integer register {\em rs1} is treated as a bit mask that specifies bit positions to be cleared in the CSR. Any bit that is high in {\em rs1} will cause the -corresponding bit to be cleared in the CSR, if that CSR bit is -writable. Other bits in the CSR are unaffected. +corresponding bit to be cleared in the CSR, if that CSR bit is writable. +Other bits in the CSR are not explicitly written. For both CSRRS and CSRRC, if {\em rs1}={\tt x0}, then the instruction will not write to the CSR at all, and so shall not cause any of the -- cgit v1.1