From 7870844bc7ad7b64fc0f09a3f120f2175c48bfab Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Tue, 24 Dec 2019 18:30:24 -0600
Subject: Clarify that access exceptions on jump targets are reported on the
 target

---
 src/rv32.tex | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/rv32.tex b/src/rv32.tex
index bbb2438..7c501f1 100644
--- a/src/rv32.tex
+++ b/src/rv32.tex
@@ -693,6 +693,10 @@ unconditional jumps and conditional branches.  Control transfer
 instructions in RV32I do {\em not} have architecturally visible delay
 slots.
 
+If an instruction access exception or instruction page fault occurs on the
+target of a jump or taken branch, the exception is reported on the target
+instruction, not on the jump or branch instruction.
+
 \subsubsection*{Unconditional Jumps}
 
 \vspace{-0.1in} The jump and link (JAL) instruction uses the J-type
-- 
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