From 4809ae416c8267d9a54c701439364349d72a98df Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Sun, 30 Jul 2017 23:58:12 -0700 Subject: clarify that more-privileged interrupts are of higher priority --- src/machine.tex | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/machine.tex b/src/machine.tex index 22f8176..b4e847b 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -1313,10 +1313,12 @@ delegated privilege mode (S or U) and that mode's interrupt enable bit (SIE or UIE in {\tt mstatus}) is set, or if the current privilege mode is less than the delegated privilege mode. -Multiple simultaneous interrupts and traps at the same privilege level -are handled in the following decreasing priority order: external -interrupts, software interrupts, timer interrupts, then finally any -synchronous traps. +Multiple simultaneous interrupts destined for different privilege modes are +handled in decreasing order of destined privilege mode. Multiple simultaneous +interrupts destined for the same privilege mode are handled in the following +decreasing priority order: external interrupts, software interrupts, then +timer interrupts. Synchronous exceptions are of lower priority than all +interrupts. \subsection{Machine Timer Registers ({\tt mtime} and {\tt mtimecmp})} -- cgit v1.1