From 02e8477fb3570329f96c266463533b9c995d2fdd Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Wed, 13 Jan 2021 15:14:58 -0800 Subject: Clean up NMI/mepc wording --- src/machine.tex | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/machine.tex b/src/machine.tex index fe41b46..56f01b6 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -2584,8 +2584,8 @@ Non-maskable interrupts (NMIs) are only used for hardware error conditions, and cause an immediate jump to an implementation-defined NMI vector running in M-mode regardless of the state of a hart's interrupt enable bits. The {\tt mepc} register is written with the -address of the next instruction to be executed at the time the NMI was -taken, and {\tt mcause} is set to a value indicating the source of the +virtual address of the instruction that was interrupted, +and {\tt mcause} is set to a value indicating the source of the NMI. The NMI can thus overwrite state in an active machine-mode interrupt handler. -- cgit v1.1