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2017-09-15Merge branch 'master' of github.com:riscv/riscv-isa-manualKrste Asanovic1-2/+2
2017-09-13Sv48 must imply Sv39Andrew Waterman1-2/+2
2017-09-10Merge branch 'master' of github.com:riscv/riscv-isa-manualKrste Asanovic1-0/+4
2017-09-10Changed names of XnnU to Unn.Krste Asanovic1-14/+14
2017-08-31Update v.texrespasa1-0/+4
2017-08-17Always order interrupt priority by privilege modeAndrew Waterman2-5/+5
2017-08-15Load address misaligned exceptions *can* occur in S-modeAndrew Waterman1-8/+9
2017-08-15Clarify interrupt priority orderAndrew Waterman2-13/+11
2017-08-15Fix typo in mideleg caption (#98)stkaplan1-1/+1
2017-07-30clarify that more-privileged interrupts are of higher priorityAndrew Waterman1-4/+6
2017-07-27Make RV32 SRAI description match RV64Andrew Waterman1-1/+1
2017-07-26Fix typo in stvec figureAndrew Waterman1-1/+1
2017-07-22Explained why vl setting rule changed.Krste Asanovic1-0/+2
2017-07-22Merge branch 'master' of github.com:riscv/riscv-isa-manualKrste Asanovic3-4/+12
2017-07-21Fix description of LR/SC for data sizeAndrew Waterman2-4/+5
2017-07-20Add note about C.MVAndrew Waterman1-0/+7
2017-07-19Changed vector-length-setting formula to guarantee monotonically decreasing v...Krste Asanovic1-1/+1
2017-07-11First sketch of vector extension sent to V Task Group.Krste Asanovic2-620/+724
2017-07-06Temp checkpoint to send to Roger.Krste Asanovic2-252/+631
2017-07-01Clarify Float Compare descriptionds2horner2-6/+8
2017-06-26Fix typo in PMP address CSR bit field diagramRichard Xia1-1/+1
2017-06-26Change remaining SCALL/SBREAK reference to ECALL/EBREAKsal1-1/+1
2017-06-24Fix typoAndrew Waterman1-1/+1
2017-06-20fix typoAndrew Waterman1-2/+2
2017-06-19Add MULHSU commentaryAndrew Waterman1-0/+6
2017-06-15Correct CALL macroAndrew Waterman1-2/+2
2017-06-14Remove FSFLAGSI, FSRMI pseudoinstructionsAndrew Waterman2-7/+1
2017-06-12Use the official DOI website for linking to DOIsPaul Wise1-1/+1
2017-06-12Update link to 'MIPS32 Architecture for Programmers' documentPaul Wise1-1/+1
2017-06-12Use https for link to riscv.orgPaul Wise1-1/+1
2017-06-12Clarify access exception type in page-table walk algorithmAndrew Waterman1-2/+3
2017-06-12Don't need bbding.styAndrew Waterman2-159/+0
2017-06-12Fix word case, typos and word choicePaul Wise4-4/+4
2017-06-05Add preface entryAndrew Waterman1-1/+2
2017-06-05Reserve mip/mie bits below 16 for standard useAndrew Waterman1-6/+4
2017-06-05FMIN/FMAX now implement minimumNumber/maximumNumber, not minNum/maxNumAndrew Waterman2-13/+66
2017-06-03Fix typoJacob Bachmeyer1-1/+1
2017-06-03Add preface entry for SUM changeAndrew Waterman1-0/+2
2017-06-03Tweak SUM commentaryAndrew Waterman1-19/+14
2017-06-03Forbid S-mode execution from user memoryJacob Bachmeyer2-5/+26
2017-06-03Incorporate Allen's feedbackAndrew Waterman4-8/+23
2017-05-20Simplified and made more comprehensive the description of handling narrower n...Krste Asanovic1-14/+6
2017-05-20Simplified explanation of writing narrower floating-point results to f regist...Krste Asanovic1-17/+17
2017-05-20FCLASS raises no exceptionsAndrew Waterman1-0/+1
2017-05-20Integer division rounds toward zeroAndrew Waterman1-1/+2
2017-05-20Clarify FCVT.W* behavior in RV64Andrew Waterman2-4/+6
2017-05-20C.LUI uses nzimm, not nzuimmAndrew Waterman1-2/+2
2017-05-19Clarify RAS pop-push orderingAndrew Waterman1-2/+2
2017-05-16Fix typo in change logMegan Wachs1-1/+1
2017-05-15Fix some orphaned/widowed commentary sectionsAndrew Waterman6-10/+14
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