aboutsummaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Expand)AuthorFilesLines
2018-05-03Color links, except in the ToC. (#168)Shaked Flur3-1/+5
2018-05-03Add graphviz sources of figures from the "RVWMO Explanatory Material" appendi...Luc Maranget10-0/+321
2018-05-03Add Luc and Yatin as memory model contributors (#169)Daniel Lustig2-12/+14
2018-05-02Un-green the Table of ContentsAndrew Waterman1-3/+1
2018-05-02Tweaks to prefaceAndrew Waterman1-3/+3
2018-05-02Updates to the memory consistency model specDaniel Lustig37-1424/+3377
2018-05-02Clarify URET with no user-mode traps support (#164)Alexandre Joannou1-2/+4
2018-05-02Fix typoAndrew Waterman1-1/+1
2018-04-28Add paragraph breakAndrew Waterman1-1/+3
2018-04-25SvXX instruction addresses are checked for sign extension, tooAndrew Waterman1-2/+4
2018-04-19Use G for PMP granularity, not LAndrew Waterman1-5/+5
2018-04-17Misaligned superpage exception occurs if pte.ppn[i−1:0]!=0Premjith1-1/+1
2018-04-13Add preface entryAndrew Waterman1-0/+1
2018-04-13Remove hyphen from M-XLEN etc.Andrew Waterman4-48/+48
2018-04-13Clarifications re: writable XLENAndrew Waterman2-3/+39
2018-04-13Resolve XLEN vs. HS-XLEN ambiguitiesAndrew Waterman1-44/+44
2018-04-13Resolve XLEN vs. S-XLEN ambiguitiesAndrew Waterman1-34/+34
2018-04-13Resolve XLEN vs. M-XLEN ambiguitiesAndrew Waterman1-58/+61
2018-04-13Inkscape figures (#156)Wesley W. Terpstra17-8179/+8688
2018-04-13Fix sstatus.spv -> hstatus.spv. (#154)Prashanth Mundkur2-2/+2
2018-04-09Hide red boxes around hyperlinksAndrew Waterman1-1/+1
2018-04-03Fix description of PMP granularity probing mechanismAndrew Waterman1-3/+3
2018-04-03Specify coarser-than-4-byte PMP semanticsAndrew Waterman2-0/+16
2018-03-31Improve interrupt priority commentaryAndrew Waterman1-7/+3
2018-03-30Make it explicit that the page-fault exceptions from address translation corr...Prashanth Mundkur1-5/+8
2018-03-28Make LR/SC CAS example adhere to the forward-progress constraintsAndrew Waterman1-1/+2
2018-03-28Explicitly allow underscores in ISA string names.Krste Asanovic1-2/+7
2018-03-26Clarify that SUM does not permit supervisor execution from user pagesAndrew Waterman1-0/+1
2018-03-23Removed some outdated text.Krste Asanovic1-53/+9
2018-03-23Closed issue #150Krste Asanovic1-2/+2
2018-03-21Add preliminary V encodingAndrew Waterman1-0/+735
2018-03-21John Hauser's alternative writable-misa.C proposalAndrew Waterman4-14/+24
2018-03-20Cleaned up configuration sections.Krste Asanovic2-199/+143
2018-03-03Merge pull request #139 from riscv/misa-cAndrew Waterman4-17/+24
2018-03-03Fix bug in RVC opcode mapAndrew Waterman1-1/+1
2018-02-27Added commentary on counter/timers.Krste Asanovic1-1/+64
2018-02-22Fix mepc/sepc definitions w.r.t. IALIGNAndrew Waterman2-11/+4
2018-02-22Tweak wording of misa.C proposalAndrew Waterman2-3/+5
2018-02-22Introduce IALIGN; propose misa.C semanticsAndrew Waterman3-6/+18
2018-02-09Added clearer definitions of execution environments and harts.Krste Asanovic5-117/+183
2018-02-08Clarify description of unused FENCE bitsAndrew Waterman1-4/+4
2018-02-07Add commentary about LR/SC forward-progress guaranteeAndrew Waterman1-0/+5
2018-01-27Moved commentary on "why new ISA?" to history chapter.Krste Asanovic2-139/+140
2018-01-27citation use macro for rev versionKrste Asanovic1-1/+1
2018-01-24Add Steve to acksAndrew Waterman1-1/+2
2018-01-23Added commentary on fixed interrupt priority scheme for mip/mie.Krste Asanovic1-0/+42
2018-01-23Standardized on pseudoinstruction.Krste Asanovic4-20/+20
2018-01-23Clarified when mip/mie bits are hardwired to zero when user mode present.Krste Asanovic3-268/+537
2018-01-23Use y instead of a in PMP addressesAndrew Waterman1-8/+8
2018-01-10Instructions with bits [ILEN-1:0] all ones are illegal (#123)Andrew Waterman1-2/+6
generated by cgit v1.1 at 2024-10-15 03:13:09 +0000