Age | Commit message (Collapse) | Author | Files | Lines | |
---|---|---|---|---|---|
2019-02-19 | Describe page-table walk speculation and SFENCE use casessfence-asid | Andrew Waterman | 1 | -0/+47 | |
2019-02-19 | tweak A/D bit wording | Andrew Waterman | 1 | -1/+1 | |
2019-02-13 | Fix typos. (#340) | Josh Scheid | 1 | -2/+2 | |
2019-02-08 | Clarify behavior of LR.rl and SC.aq (#339) | Andrew Waterman | 1 | -3/+6 | |
Resolves #338 | |||||
2019-02-07 | Fix typos. (#337) | Josh Scheid | 2 | -4/+4 | |
2019-02-01 | Make the mcause table easier to find. | Prashanth Mundkur | 1 | -2/+2 | |
2019-01-31 | Operational memory model and litmus tests are in GitHub (#335) | Shaked Flur | 2 | -7/+34 | |
* Fixed the litmus tests URL. * Now that the rmem source is available in github, give a short description of the tool and where to find it. | |||||
2019-01-29 | Fix a couple of typos and inconsistencies. (#334) | Prashanth Mundkur | 1 | -6/+6 | |
2019-01-28 | Forgot to indicate that mstatus.FS is a WARL field. | Andrew Waterman | 1 | -1/+1 | |
2019-01-22 | Nest mstatus subsections | Andrew Waterman | 2 | -5/+8 | |
h/t Dan Hopper | |||||
2019-01-21 | Add tentative HFENCE.BVMA and HFENCE.GVMA encodings | Andrew Waterman | 1 | -1/+28 | |
2019-01-21 | Add hypervisor CSR listing | Andrew Waterman | 1 | -43/+42 | |
2019-01-21 | A/D updates are globally ordered | Andrew Waterman | 1 | -1/+4 | |
2019-01-21 | Fix typo. (#326) | Prashanth Mundkur | 1 | -1/+1 | |
2019-01-18 | Clarify that FMV.X.W doesn't canonicalize NaN payloads | Andrew Waterman | 2 | -1/+7 | |
We said this explicitly for FMV.W.X, but not the other way around. | |||||
2019-01-17 | JALR is not allowed within LR/SC sequences | Andrew Waterman | 1 | -1/+1 | |
This used to be the case, until an editing error several years ago. | |||||
2018-12-27 | Clarify that writing pmpcfg does not alter pmpaddr's underlying value | Andrew Waterman | 1 | -0/+4 | |
Closes #320. | |||||
2018-12-26 | Rephrase NA4 restriction | Andrew Waterman | 1 | -1/+1 | |
Closes #321 | |||||
2018-12-21 | tweaks | Andrew Waterman | 2 | -4/+3 | |
2018-12-21 | Address space is circular | Andrew Waterman | 1 | -1/+7 | |
Closes #40 | |||||
2018-12-21 | Add extension dependences to table | Andrew Waterman | 1 | -32/+34 | |
Closes #317 | |||||
2018-12-21 | Specify ordering of privileged and non-standard extensions | Andrew Waterman | 1 | -16/+45 | |
Closes #319 | |||||
2018-12-20 | Specify ordering of Z extensions | Andrew Waterman | 1 | -0/+7 | |
Closes #273 | |||||
2018-12-20 | Clean up naming and define G = IMAFDZicsr_Zifencei | Andrew Waterman | 3 | -22/+18 | |
Closes #266. | |||||
2018-12-20 | tweaks | Andrew Waterman | 1 | -4/+5 | |
2018-12-20 | Merge pull request #311 from brucehoult/ra-sp-cleanup | Krste Asanovic | 1 | -6/+22 | |
Clean up description of x registers. Add commentary about ABI | |||||
2018-12-20 | Improve description of IEEE exception-flag setting | Andrew Waterman | 1 | -10/+9 | |
This makes the distinction between RISC-V exceptions and IEEE exceptions clearer. | |||||
2018-12-20 | Add contributor | Andrew Waterman | 1 | -1/+1 | |
2018-12-20 | Clarify that PTE updates aren't atomic w.r.t. the ultimate access (#308) | Andrew Waterman | 1 | -3/+9 | |
I claim that this follows from the text in the following section, but it is clearly deserving of clarification. https://groups.google.com/a/groups.riscv.org/forum/?utm_medium=email&utm_source=footer#!msg/isa-dev/EQQGObY1bQM/xm6imw-aCwAJ | |||||
2018-12-20 | Clarify sign extension of W and D instructions (#313) | Bruce Hoult | 1 | -5/+7 | |
2018-12-20 | Add contributor (#314) | Bruce Hoult | 1 | -1/+1 | |
2018-12-20 | ABIs could dedicate other JALR base registers | Andrew Waterman | 1 | -1/+3 | |
Closes #309 | |||||
2018-12-20 | Clean up description of x registers. Add commentary about ABI | Bruce Hoult | 1 | -6/+22 | |
2018-12-19 | Update commentary to reflect MIPS r6 conditional branches | Bruce Hoult | 1 | -2/+2 | |
2018-12-19 | Improve description of C opcode map | Andrew Waterman | 1 | -1/+3 | |
2018-12-19 | Improve rd'/rs1'/rs2' typesetting | Andrew Waterman | 2 | -118/+122 | |
2018-12-14 | Disambiguate P extension in ISA strings | Andrew Waterman | 1 | -0/+5 | |
Closes #305 | |||||
2018-12-14 | ISA extension dependences can be assumed in ISA name strings | Andrew Waterman | 2 | -10/+4 | |
2018-12-14 | cleanup | Andrew Waterman | 1 | -2/+2 | |
2018-12-13 | Make branch immediate description more similar to jumps | Andrew Waterman | 1 | -2/+3 | |
Closes #306 h/t @wdc-pnl | |||||
2018-12-12 | Fix some incorrect references to RV32IF (as opposed to RV32IFZicsr) | Andrew Waterman | 2 | -4/+4 | |
2018-12-11 | Restate that conditional branches can raise misaligned exceptions in RVI | Andrew Waterman | 1 | -0/+12 | |
This is a bit redundant, since we state this at the front of the chapter. But since we also restate it for JAL/JALR, it's better to maintain symmetry and restate it for branches, too. Closes #303 h/t @benjaminselfridge | |||||
2018-12-10 | Remark that F depends on Zicsr | Andrew Waterman | 1 | -6/+7 | |
2018-12-10 | ISA strings can't leverage extension-dependence properties | Andrew Waterman | 1 | -0/+10 | |
Resolves #290 | |||||
2018-12-10 | subset -> extension | Andrew Waterman | 5 | -21/+21 | |
2018-12-10 | X*/S*/Z* names must be fully alphabetical | Andrew Waterman | 1 | -6/+6 | |
Resolves #294 | |||||
2018-12-10 | fix typos | Andrew Waterman | 1 | -2/+2 | |
2018-12-04 | Debug registers 7A0-7AF are accessible to M-mode | Andrew Waterman | 1 | -3/+5 | |
Resolves #295 | |||||
2018-12-04 | Re-version priv spec | Andrew Waterman | 1 | -1/+1 | |
2018-12-04 | Version of priv spec ready for ratification process | Andrew Waterman | 3 | -8/+22 | |