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AgeCommit message (Expand)AuthorFilesLines
2019-03-15Add more MXR/SUM commentaryAndrew Waterman1-0/+6
2019-03-14memory -> main memoryAndrew Waterman1-1/+1
2019-03-13Fix HFENCE definitions to include all stores, not just local onesAndrew Waterman1-7/+7
2019-03-13Improve synchronous exception priority table/descriptionAndrew Waterman1-18/+19
2019-03-13Improve commentary on CSR orderingAndrew Waterman1-5/+8
2019-03-13Improve wording of satp/ASID/caching/speculation paragraphAndrew Waterman1-5/+16
2019-03-13Revise CSR-ordering sectionAndrew Waterman1-6/+22
2019-03-13Clarify which exception is raised in two casesAndrew Waterman1-2/+2
2019-03-12Specify synchronous exception priority orderingAndrew Waterman2-0/+47
2019-03-12Clarify that CSR accesses can be ordered with FENCEsAndrew Waterman1-0/+17
2019-03-12Reformat CSR address map tableAndrew Waterman1-29/+39
2019-03-08SFENCE.VMA orders visible stores, not just local storesAndrew Waterman1-5/+5
2019-03-08Clarify misleading text in Zifencei chapterAndrew Waterman1-5/+5
2019-03-07Update prefaceAndrew Waterman1-0/+1
2019-03-07Update mcause/scause tables to allocate some custom exception causesAndrew Waterman2-12/+22
2019-03-07Add software constraint for future global-ASID extensionAndrew Waterman3-3/+23
2019-03-07Tweaks suggested by Bill HuffmanAndrew Waterman4-4/+4
2019-03-07Restate FENCE.TSO constraints from Table 2.1 in the textAndrew Waterman1-1/+3
2019-03-07SFENCE.VMA clarificationsAndrew Waterman1-3/+8
2019-03-05Hypervisor draft v0.3Andrew Waterman1-62/+90
2019-03-05Embellish descriptions in Q chapterAndrew Waterman1-4/+10
2019-03-05Add text that was erroneously excised from Q chapter (in 2013!)Andrew Waterman1-0/+10
2019-03-05Add Q opcode listingAndrew Waterman1-0/+405
2019-03-05Removed outdated vector instruction table.IMFDQC-Ratification-20190305Krste Asanovic1-733/+0
2019-03-05Version 20190305-Base-Ratification for ratification vote.Krste Asanovic4-1490/+21
2019-03-04Add hypervisor caveatAndrew Waterman1-0/+3
2019-03-04Add lla pseudoinstruction; add PIC version of laAndrew Waterman1-13/+17
2019-03-04Fix formattingAndrew Waterman1-3/+3
2019-02-28Describe page-table walk speculation and SFENCE use casesAndrew Waterman1-0/+49
2019-02-23fma tweak2 (#344)Bruce Hoult1-2/+2
2019-02-23tweakAndrew Waterman1-2/+2
2019-02-23Improve description of FNMADD/FNMSUB instructionsAndrew Waterman1-4/+22
2019-02-22Add misa to reset sectionAndrew Waterman1-1/+5
2019-02-19tweak A/D bit wordingAndrew Waterman1-1/+1
2019-02-13Fix typos. (#340)Josh Scheid1-2/+2
2019-02-08Clarify behavior of LR.rl and SC.aq (#339)Andrew Waterman1-3/+6
2019-02-07Fix typos. (#337)Josh Scheid2-4/+4
2019-02-01Make the mcause table easier to find.Prashanth Mundkur1-2/+2
2019-01-31Operational memory model and litmus tests are in GitHub (#335)Shaked Flur2-7/+34
2019-01-29Fix a couple of typos and inconsistencies. (#334)Prashanth Mundkur1-6/+6
2019-01-28Forgot to indicate that mstatus.FS is a WARL field.Andrew Waterman1-1/+1
2019-01-22Nest mstatus subsectionsAndrew Waterman2-5/+8
2019-01-21Add tentative HFENCE.BVMA and HFENCE.GVMA encodingsAndrew Waterman1-1/+28
2019-01-21Add hypervisor CSR listingAndrew Waterman1-43/+42
2019-01-21A/D updates are globally orderedAndrew Waterman1-1/+4
2019-01-21Fix typo. (#326)Prashanth Mundkur1-1/+1
2019-01-18Clarify that FMV.X.W doesn't canonicalize NaN payloadsAndrew Waterman2-1/+7
2019-01-17JALR is not allowed within LR/SC sequencesAndrew Waterman1-1/+1
2018-12-27Clarify that writing pmpcfg does not alter pmpaddr's underlying valueAndrew Waterman1-0/+4
2018-12-26Rephrase NA4 restrictionAndrew Waterman1-1/+1
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