| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2021-08-29 | Add CSRs henvcfg/henvcfgh to hypervisor extension | John Hauser | 1 | -2/+88 | |
| 2021-08-29 | Add mseccfg CSR | Andrew Waterman | 3 | -0/+56 | |
| 2021-08-29 | Add preface entry | Andrew Waterman | 1 | -0/+2 | |
| 2021-08-29 | Designate some of SYSTEM opcode for custom use | Andrew Waterman | 1 | -0/+40 | |
| 2021-08-28 | Add mconfigptr CSR (#697) | Andrew Waterman | 3 | -0/+49 | |
| * Add Smdisc extension (i.e. mconfigptr CSR) * mconfigptr may be hardwired to zero * Add changelog entry for mconfigptr * Fix mconfigptr preface entry "points to the address of" implies an extra level of indirection. Should be "points to" or "contains the address of" | |||||
| 2021-08-28 | Replace "EEI" with "execution environment" (#723) | John Hauser | 4 | -33/+49 | |
| Make the manual more correct and consistent by dropping the term _execution environment interface_ and its abbreviation _EEI_ and replacing them everywhere with just _execution environment_. | |||||
| 2021-08-27 | Fix (again) non-normative CSR side-effect text | Andrew Waterman | 1 | -2/+1 | |
| CLIC will add unprivileged CSRs with write side effects, so remove the soon-to-be-incorrect clause. See https://github.com/riscv/riscv-fast-interrupt/issues/166 | |||||
| 2021-08-25 | Remove historical remark on MRET definition | Andrew Waterman | 1 | -9/+0 | |
| Since the N extension is gone, the comment is largely irrelevant. The virtualization comment still partially applies, because we wish to be able to virtualize M/HS inside S/VS, but has also become less relevant because of the TSR feature in mstatus. | |||||
| 2021-08-24 | Fix non-normative text about CSR ordering (#720) | Andrew Waterman | 1 | -9/+12 | |
| The non-normative text erroneously suggested that only accesses to time/cycle/mcycle need be ordered by FENCEs. In fact, other CSR accesses are also visible to other harts, including interrupt-pending CSRs. (The preceding normative text has no such deficiency.) | |||||
| 2021-08-24 | Add marchid for Hummingbirdv2 E203 (#664) | hucan7 | 1 | -1/+1 | |
| 2021-08-18 | Update H chapter table of synchronous exception priorities (#717) | John Hauser | 1 | -20/+19 | |
| 2021-08-18 | Tweak table of synchronous exception priorities (#716) | John Hauser | 1 | -5/+6 | |
| 2021-08-17 | Make explicit the priorities of synch. exceptions of H extension (#711) | John Hauser | 1 | -0/+53 | |
| * Make explicit the priorities of synch. exceptions of H extension * "page guest-fault" -> "guest-page fault" | |||||
| 2021-08-17 | Clarify priorities of synchronous exceptions (#715) | John Hauser | 1 | -14/+30 | |
| 2021-08-16 | stval already cannot be zero on breakpoints, misaligned addresses (#714) | John Hauser | 1 | -5/+2 | |
| 2021-08-16 | VS mode should not see exception code 10 (#712) | John Hauser | 1 | -0/+1 | |
| 2021-08-16 | Merge branch 'jhauser-us-jhauser-2021-HBaseI' | Andrew Waterman | 1 | -0/+5 | |
| 2021-08-16 | Insert missing comma | Andrew Waterman | 1 | -1/+1 | |
| 2021-08-16 | State additional dependencies of hypervisor extension | John Hauser | 1 | -0/+5 | |
| 2021-08-16 | Corrections to mstatus in hypervisor chapter (#710) | John Hauser | 1 | -2/+2 | |
| 1. For RV32, mstatush is now always required to exist. 2. mstatus.MPP is not just one bit. | |||||
| 2021-08-16 | Minor improvements to text for virtual instruction exceptions (#709) | John Hauser | 1 | -2/+5 | |
| 2021-08-13 | Clarify when mstatus.FS may be hardwired zero (#707) | John Hauser | 1 | -3/+5 | |
| 2021-08-11 | Interrupt conditions are also evaluated on falling edges | Andrew Waterman | 2 | -2/+4 | |
| 2021-08-11 | Generalize interrupt trap condition evaluation conditions (#705) | Andrew Waterman | 2 | -2/+5 | |
| This approach is more extensible, and now implicitly includes writes to sstatus.SIE / mstatus.MIE, as it should. | |||||
| 2021-08-11 | Clarify that RV64 accesses to mtime[cmp] are atomic | Andrew Waterman | 1 | -1/+1 | |
| As stated clearly by the preceding text, the baroque sequence for updating mtimecmp is for RV32. RV64 simply uses aligned loads and stores. Closes #639 | |||||
| 2021-08-11 | State that misa.F does not affect mstatus.FS | Andrew Waterman | 1 | -2/+13 | |
| Closes #534 | |||||
| 2021-08-08 | Improve rules for virtual instruction exceptions, again (#703) | John Hauser | 1 | -19/+66 | |
| One, clarify the rules for virtual instruction exceptions by adding the concept of _HS-qualified_; and two, make a special case for accesses to 32-bit high-half CSRs like cycleh and htimedeltah. Also, when WFI is attempted in VU mode, the exception depends on mstatus.TW. | |||||
| 2021-08-06 | Clarify mepc invalid address conversion | Andrew Waterman | 2 | -8/+12 | |
| If any addresses are invalid, mepc must be able to hold at least one of them. | |||||
| 2021-08-05 | Improve description of interrupt traps (#701) | Andrew Waterman | 3 | -28/+41 | |
| Supersedes #590 | |||||
| 2021-08-02 | Merge branch 'jhauser-us-jhauser-2021-extStats' | Andrew Waterman | 17 | -125/+1200 | |
| 2021-08-02 | Ratified Zihintpause is version 2.0 | Andrew Waterman | 2 | -2/+2 | |
| 2021-08-02 | Fix format for ratified Zihintpause in preface table, part 2 | John Hauser | 1 | -1/+1 | |
| 2021-08-02 | Fix format for ratified Zihintpause in preface table | John Hauser | 1 | -1/+1 | |
| 2021-08-02 | Zihintpause is ratified | John Hauser | 1 | -1/+1 | |
| 2021-08-02 | Update status of various extensions | John Hauser | 2 | -1/+16 | |
| 2021-08-02 | change verison number and add spec state (#698) | Tariq Kurd | 1 | -1/+6 | |
| 2021-08-02 | Drop NaN boxing from Zfinx | Andrew Waterman | 1 | -7/+14 | |
| See new non-normative text for explanation | |||||
| 2021-08-02 | Made clear chapter is defining four extensions for different precisions. | Krste Asanovic | 1 | -31/+34 | |
| Reordered sections to remove forward references. | |||||
| 2021-08-02 | Removed "baseline" from description of F extension in comment. | Krste Asanovic | 1 | -3/+2 | |
| 2021-08-02 | Add Zhinxmin | Andrew Waterman | 1 | -0/+11 | |
| 2021-08-02 | Remove Zqinx from one more place | Andrew Waterman | 1 | -1/+1 | |
| 2021-08-02 | Update src/zfinx.tex | Andrew Waterman | 1 | -1/+1 | |
| Co-authored-by: Paul Donahue <48959409+pdonahue-ventana@users.noreply.github.com> | |||||
| 2021-08-02 | bump Zfinx verison to 0.41 | Andrew Waterman | 1 | -1/+1 | |
| 2021-08-02 | improve wording | Andrew Waterman | 1 | -5/+4 | |
| 2021-08-02 | Remove Zqinx (for now, at least) | Andrew Waterman | 1 | -6/+6 | |
| 2021-08-02 | Augment rationale | Andrew Waterman | 1 | -0/+1 | |
| 2021-08-02 | Add Zhinx | Andrew Waterman | 1 | -0/+14 | |
| 2021-08-02 | Add missing text | Andrew Waterman | 1 | -0/+1 | |
| 2021-08-02 | Note that reading x0 reads as 0 for wide FP operands, too | Andrew Waterman | 1 | -1/+4 | |
| 2021-08-02 | Add misa.F/D/Q=0 constraint | Andrew Waterman | 1 | -0/+8 | |
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index : riscv-isa-manual.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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