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2020-06-04FADD/FSUB can't raise UF, hence, no PPO dependenceAndrew Waterman1-4/+4
2020-06-04Fix unclarity in MPRV definition introduced by 569d07195a8495460f04592d845515...Andrew Waterman1-1/+1
2020-05-31Merge pull request #525 from riscv/64-pmp-entriesAndrew Waterman3-28/+51
2020-05-22Extend PMP scheme to support 64 regionsAndrew Waterman3-28/+51
2020-05-21Merge pull request #523 from jhauser-us/jhauser-hstatusVTWAndrew Waterman1-21/+14
2020-05-18Clarify that satp.MODE=Bare with satp.LSBs != 0 is unspecified for nowAndrew Waterman1-0/+3
2020-05-14Add VTW field to hstatus; improve rules for WFI in virtual modesJohn Hauser1-21/+14
2020-05-14Merge pull request #518 from jhauser-us/jhauser-virtualinstexceptionAndrew Waterman1-13/+90
2020-05-13Expand the circumstances that raise virtual instruction exceptionsJohn Hauser1-18/+20
2020-05-11Improve description of RV64 *W instructionsAndrew Waterman1-7/+8
2020-05-05Clarify that _coherent_ main memory regions use RVWMO or RVTSOAndrew Waterman1-2/+4
2020-05-05Add virtual instruction exceptions to the hypervisor extensionJohn Hauser1-12/+87
2020-04-23Clarify semantics of sfence.vma with rs1 != 0 (#515)Jonathan Behrens1-2/+2
2020-04-22Clarify that mtimecmp comparison is unsignedAndrew Waterman1-3/+4
2020-04-22Clarify that various reset events are relative to hart resetAndrew Waterman1-4/+4
2020-04-17Clarify that RV64 accesses to mtime/mtimecmp are atomicAndrew Waterman1-0/+3
2020-04-16Make misaligned exception text more generic than RV32Andrew Waterman1-3/+3
2020-04-16Clarify that the EEI defines misaligned FP ld/st behaviorAndrew Waterman2-0/+5
2020-04-14Avoid "should" when describing a mandateAndrew Waterman1-2/+2
2020-04-09Non misleading bit width expression in chapter C (#506)Takahiro1-34/+34
2020-04-06Clarify that FENCE + remote FENCE.I is insufficient for local hart (#503)Jessica Clarke1-1/+1
2020-04-06Add commentary about multi-hit/failing to SFENCE.VMAAndrew Waterman1-0/+18
2020-04-06Update .travis.yml (#502)Neel Gala1-1/+1
2020-04-06Clarify offset range in RV64I (#501)Nick Knight1-3/+3
2020-04-05RV64 -> RV64IAndrew Waterman1-1/+1
2020-04-05Add note about AUIPC+JALR range in RV64Andrew Waterman1-0/+6
2020-03-26fixing api_key formatNeel Gala1-2/+1
2020-03-26using dplv2 for releasesNeel Gala1-1/+2
2020-03-23Extensions: List all integer base ISAs (#493)Philipp Wagner1-3/+3
2020-03-23PMP reset values are now platform-definedAndrew Waterman2-2/+5
2020-03-16Add preface section for older version 20191213Andrew Waterman1-0/+55
2020-03-03Clarified overflow behavior of mtime register.Krste Asanovic1-3/+4
2020-03-03Clarify operation of 32-bit AMOs on RV64.Krste Asanovic1-1/+2
2020-03-03Merge pull request #453 from riscv/u-immediateKrste Asanovic2-9/+13
2020-03-03Clarified description of sstatus.Krste Asanovic1-4/+5
2020-03-03Refined definition of WARL.Krste Asanovic1-1/+1
2020-03-02Make clear that "store exception" is "store/AMO exception".Krste Asanovic1-1/+1
2020-03-02Clarify which exceptions are raised by LR/SC/AMOAndrew Waterman1-0/+4
2020-03-01Merge pull request #413 from marceg/gauthierm-customKrste Asanovic1-11/+15
2020-02-28Clarify that FCVT instructions signal inexactAndrew Waterman1-0/+4
2020-02-28Move VALEN check to the top of Translation Process sectionAndrew Waterman1-2/+2
2020-02-28Add VA canonicalization check to Translation Process sectionAndrew Waterman1-7/+15
2020-02-12Incorporate Andy Glew's commentsAndrew Waterman1-4/+3
2020-02-12Only describe scounteren in supervisor chapterAndrew Waterman3-20/+15
2020-02-11The RVWMO is version 2.0 (#483)Palmer Dabbelt1-1/+1
2020-02-10Update chapters 2 and 7 for Hypervisor v0.6Andrew Waterman2-1/+146
2020-02-08Update hypervisor spec to v0.6Andrew Waterman2-248/+423
2020-01-24Clarify mvendorid.Bank vs. JEDEC bank numberAndrew Waterman1-0/+6
2020-01-20ignore write to "controlled" SBE and UBE. (#477)David-Horner1-2/+2
2020-01-13Correct left double quotes (#475)ansimita1-1/+1
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