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2021-08-11Generalize interrupt trap condition evaluation conditions (#705)Andrew Waterman2-2/+5
2021-08-11Clarify that RV64 accesses to mtime[cmp] are atomicAndrew Waterman1-1/+1
2021-08-11State that misa.F does not affect mstatus.FSAndrew Waterman1-2/+13
2021-08-08Improve rules for virtual instruction exceptions, again (#703)John Hauser1-19/+66
2021-08-06Clarify mepc invalid address conversionAndrew Waterman2-8/+12
2021-08-05Improve description of interrupt traps (#701)Andrew Waterman3-28/+41
2021-08-02Merge branch 'jhauser-us-jhauser-2021-extStats'Andrew Waterman17-125/+1200
2021-08-02Ratified Zihintpause is version 2.0Andrew Waterman2-2/+2
2021-08-02Fix format for ratified Zihintpause in preface table, part 2John Hauser1-1/+1
2021-08-02Fix format for ratified Zihintpause in preface tableJohn Hauser1-1/+1
2021-08-02Zihintpause is ratifiedJohn Hauser1-1/+1
2021-08-02Update status of various extensionsJohn Hauser2-1/+16
2021-08-02change verison number and add spec state (#698)Tariq Kurd1-1/+6
2021-08-02Drop NaN boxing from ZfinxAndrew Waterman1-7/+14
2021-08-02Made clear chapter is defining four extensions for different precisions.Krste Asanovic1-31/+34
2021-08-02Removed "baseline" from description of F extension in comment.Krste Asanovic1-3/+2
2021-08-02Add ZhinxminAndrew Waterman1-0/+11
2021-08-02Remove Zqinx from one more placeAndrew Waterman1-1/+1
2021-08-02Update src/zfinx.texAndrew Waterman1-1/+1
2021-08-02bump Zfinx verison to 0.41Andrew Waterman1-1/+1
2021-08-02improve wordingAndrew Waterman1-5/+4
2021-08-02Remove Zqinx (for now, at least)Andrew Waterman1-6/+6
2021-08-02Augment rationaleAndrew Waterman1-0/+1
2021-08-02Add ZhinxAndrew Waterman1-0/+14
2021-08-02Add missing textAndrew Waterman1-0/+1
2021-08-02Note that reading x0 reads as 0 for wide FP operands, tooAndrew Waterman1-1/+4
2021-08-02Add misa.F/D/Q=0 constraintAndrew Waterman1-0/+8
2021-08-02Incorporate Krste's feedbackAndrew Waterman1-24/+42
2021-08-02Add Zfinx draftAndrew Waterman2-0/+91
2021-07-30Make CSR hvip independent of hideleg (#680)John Hauser1-2/+2
2021-07-30Rename hypervisor extension "operating mode" to "privilege mode" (#677)John Hauser1-24/+29
2021-07-30Improved rules for virtual instruction exceptions (#694)John Hauser1-18/+32
2021-07-30Bump H extension version to 0.6.2 (#695)John Hauser1-1/+1
2021-07-28Draft of Zfh extension for IEEE 754 binary16 support (#496)Andrew Waterman4-2/+888
2021-07-25Remove trailing spaces in Makefile (#692)Axel Heider1-4/+4
2021-07-22Resolve contradiction in mtval definition (#685)Andrew Waterman1-7/+11
2021-07-22Standard CSRs don't have read side effects (#687)Andrew Waterman2-3/+8
2021-07-22mstatush is not optional in priv-1.12 (#683)Andrew Waterman2-5/+2
2021-07-21Improve labels of CSR categories (#684)John Hauser1-11/+11
2021-07-19Switch to travis-ci.com (#681)Andrew Waterman1-1/+1
2021-07-19Only trigger travis build on pushes to masterAndrew Waterman1-0/+3
2021-07-18Clarify S-PMAs required for HLVX instructions (#679)John Hauser1-3/+12
2021-07-18Merge pull request #678 from jhauser-us/jhauser-2021-H-GVA-misalignedAddrsAndrew Waterman1-3/+9
2021-07-18Improve comment about hstatus SPV = 1, GVA = 0John Hauser1-1/+1
2021-07-18mstatus/hstatus GVA bit may be set for breakpoint trapsJohn Hauser1-2/+6
2021-07-17mstatus/hstatus GVA bit is set for address-misaligned trapsJohn Hauser1-3/+5
2021-07-13Remove or downgrade more references to N extension (#674)John Hauser6-41/+12
2021-07-06Clarify that SFENCE.VMA isn't required for SbareAndrew Waterman2-0/+5
2021-07-06Fix b6cade07034d39e65134a879a5c3369d50e0df0eAndrew Waterman1-1/+0
2021-07-06Remove N extension chapter for nowAndrew Waterman1-235/+0