| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2024-03-20 | Merge pull request #1275 from riscv/zicond | Bill Traynor | 2 | -13/+312 | |
| Integration of Zicond into Unpriv. | |||||
| 2024-03-20 | Merge pull request #1277 from riscv/revert-1274-svadu | Bill Traynor | 2 | -97/+4 | |
| Revert "Integrate svadu chapter into priv." | |||||
| 2024-03-20 | Revert "Integrate svadu chapter into priv." | Bill Traynor | 2 | -97/+4 | |
| 2024-03-20 | Merge branch 'main' into zicond | Bill Traynor | 35 | -30/+23424 | |
| Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
| 2024-03-20 | Merge pull request #1274 from riscv/svaduriscv-isa-release-b824d33-2024-03-20 | Bill Traynor | 2 | -4/+97 | |
| Integrate svadu chapter into priv. | |||||
| 2024-03-20 | Merge branch 'main' into svadu | Bill Traynor | 34 | -30/+23327 | |
| Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
| 2024-03-20 | Merge pull request #1273 from riscv/smcntrpmfriscv-isa-release-9a57b51-2024-03-20riscv-isa-release-6f47204-2024-03-20 | Bill Traynor | 2 | -0/+74 | |
| Smcntrpmf chapter integration. | |||||
| 2024-03-20 | Merge pull request #1272 from riscv/zacas | Bill Traynor | 3 | -3/+286 | |
| Integrate zacas chapter. | |||||
| 2024-03-20 | Merge branch 'main' into zacas | Bill Traynor | 32 | -31/+22971 | |
| Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
| 2024-03-20 | Merge pull request #1271 from riscv/vector-cryptoriscv-isa-release-ebfe9d2-2024-03-20 | Bill Traynor | 3 | -13/+4988 | |
| Vector crypto chapter integration. | |||||
| 2024-03-20 | Update riscv-spec.bib | Bill Traynor | 1 | -0/+3 | |
| Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
| 2024-03-20 | Merge branch 'main' into vector-crypto | Bill Traynor | 31 | -28/+17947 | |
| Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
| 2024-03-20 | Merge pull request #1266 from riscv/scalar-cryptoriscv-isa-release-30310bb-2024-03-20 | Bill Traynor | 6 | -8/+7396 | |
| Scalar crypto | |||||
| 2024-03-20 | Merge branch 'main' into scalar-crypto | Bill Traynor | 59 | -123/+15665 | |
| Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
| 2024-03-20 | Adding Volume I to title. | wmat | 1 | -1/+1 | |
| Adding Volume I to title to match Valume II title. | |||||
| 2024-03-20 | Merge pull request #1087 from riscv/bitmanipriscv-isa-release-48ddf7c-2024-03-20 | Bill Traynor | 2 | -13/+3897 | |
| Bitmanip chapter integration. | |||||
| 2024-03-20 | Merge branch 'main' into bitmanip | Bill Traynor | 147 | -13981/+12930 | |
| Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
| 2024-03-20 | Fix desc for signextend | wmat | 1 | -2/+2 | |
| This is a manual application of PR#172 from the Bitmanip repo. | |||||
| 2024-03-20 | show opcode as 7-bits like all other insn for unzip and zip #181 | wmat | 1 | -4/+2 | |
| This is a manual application of PR#181 from Bitmanip repo. | |||||
| 2024-03-20 | strlen: Replace PTRLOG with explicit 3 | wmat | 1 | -1/+1 | |
| This is a manual application of PR#182 against the Bitmanip repo. | |||||
| 2024-03-19 | Merge pull request #1088 from riscv/vectorriscv-isa-release-aa5dce0-2024-03-20 | Bill Traynor | 23 | -5/+6698 | |
| 2024-03-19 | Merge branch 'main' into vector | Andrew Waterman | 129 | -13980/+6235 | |
| Signed-off-by: Andrew Waterman <andrew@sifive.com> | |||||
| 2024-03-19 | Smrnmi 0.5 is frozen | Andrew Waterman | 1 | -2/+2 | |
| 2024-03-19 | Remove old comment and reformat contributors. | wmat | 2 | -11/+77 | |
| Removed an old comment as per Phillip's recommendation and reformatted the contributors section in the header for easier reading. | |||||
| 2024-03-19 | Add svadu.adoc to git tracking. | wmat | 1 | -0/+92 | |
| Add svadu.adoc to git tracking. | |||||
| 2024-03-19 | Add zicond.adoc to git tracking. | wmat | 1 | -0/+228 | |
| Add zicond.adoc to git tracking. | |||||
| 2024-03-19 | Integration of Zicond into Unpriv. | wmat | 1 | -1/+2 | |
| This integrates the Zicond extension into the Unprivileged spec. | |||||
| 2024-03-19 | Integrate svadu chapter into priv. | wmat | 1 | -4/+5 | |
| This pulls in the "Svadu" spec into the Privileged spec. | |||||
| 2024-03-19 | Fixing title and anchor. | wmat | 1 | -1/+2 | |
| Fixed the title to match other chapters. Set the anchor. | |||||
| 2024-03-19 | Add smcntrpmf.adoc to git tracking | wmat | 1 | -0/+72 | |
| Add smcntrpmf.adoc to git tracking | |||||
| 2024-03-19 | Integrate Smcntrpmf chapter. | wmat | 1 | -0/+1 | |
| This pulls in the Smcntrpmf chapter to the Privileged spec. | |||||
| 2024-03-19 | Integrate zacas chapter. | wmat | 3 | -2/+285 | |
| Pull in the zacas spec. Update bibliography and contributors. | |||||
| 2024-03-19 | Merge branch 'vector' of github.com:riscv/riscv-isa-manual into vector | wmat | 1 | -9/+14 | |
| 2024-03-19 | Fixed a couple of Notes | wmat | 1 | -1/+4 | |
| Adding the standard Note formatting. | |||||
| 2024-03-19 | Adding Zvknc | wmat | 1 | -0/+24 | |
| Missed this instruction on the first pass, so adding it in. | |||||
| 2024-03-19 | Integration of Vector Crypto chapter. | wmat | 3 | -5/+4999 | |
| Added missing contributors. Added all Vector Crypto content. Added Bibliography entries. | |||||
| 2024-03-18 | Clarify slide semantics (#1268) | Nick Knight | 1 | -7/+7 | |
| 2024-03-18 | Merge pull request #1267 from riscv/rvv-1.0-fixes | Krste Asanovic | 1 | -2/+7 | |
| Incorporate two fixes to RVV 1.0 spec | |||||
| 2024-03-18 | Clarify that vsetvli x0,x0 is reserved when vill was 1 beforehand | Andrew Waterman | 1 | -2/+3 | |
| See discussion at https://lists.riscv.org/g/tech-vector-ext/message/846 | |||||
| 2024-03-18 | Relax behavior for problematic source/dest mismatched EEW overlap case | Andrew Waterman | 1 | -0/+4 | |
| See discussion at https://lists.riscv.org/g/tech-vector-ext/message/845 | |||||
| 2024-03-16 | Add Zicfilp support to Smrnmi | Andrew Waterman | 2 | -8/+18 | |
| 2024-03-16 | RNMI handler -> RNMI trap handler | Andrew Waterman | 1 | -2/+2 | |
| 2024-03-15 | Merge pull request #1264 from visitorckw/fix-zawsr-typo | Andrew Waterman | 1 | -1/+1 | |
| Fix typo in Zawrs title | |||||
| 2024-03-16 | Fix typo in Zawrs title | Kuan-Wei Chiu | 1 | -1/+1 | |
| Replace 'Statndard' with 'Standard'. | |||||
| 2024-03-15 | Upgrade the version of some GitHub Actions | Rafael Sene | 2 | -18/+9 | |
| Signed-off-by: Rafael Sene <rafael@riscv.org> | |||||
| 2024-03-15 | Fixing Figure 16 diagram | wmat | 1 | -0/+3 | |
| Figure 16 Standard portion of mie diagram was incorrect. Fixed missing MEIE bit. | |||||
| 2024-03-14 | Bumping version to 1.0.0 | wmat | 1 | -1/+1 | |
| THe version in the title was 0.0 so bumping to 1.0.0 | |||||
| 2024-03-13 | Adding brev8, xperm8, and xperm4 | wmat | 1 | -0/+173 | |
| This 3 instructions were in the scalar spec but not in the bitmanip spec. Adding to match scalar spec. | |||||
| 2024-03-13 | Make all appendices sections. | wmat | 1 | -0/+1211 | |
| Move the appendices to be sections within the chapter. | |||||
| 2024-03-13 | Move appendix for Scalar to a section within the Chapter. | wmat | 1 | -0/+273 | |
| Moving the Rationale appendix to be a section at the end of the Scalar chapter. | |||||
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index : riscv-isa-manual.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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