Age | Commit message (Collapse) | Author | Files | Lines | |
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2024-04-09 | Updating chapter titles to make them consisten. | wmat | 31 | -38/+38 | |
Removed extraneous use of the word Standard. Quoted extension names when applicable. | |||||
2024-04-09 | Merge pull request #1337 from riscv/typos-in-C-extensionriscv-isa-release-c6cf0cb-2024-04-09 | Bill Traynor | 1 | -3/+3 | |
Typo fixes. | |||||
2024-04-09 | Typo fixes. | wmat | 1 | -3/+3 | |
Fixes #1332 where RV6 s/b RV64. Fixes #1333 where LDSP s/b LQSP. Fixes #1334 where SQSW s/b SQ. | |||||
2024-04-09 | Fix Svvptc bug | Andrew Waterman | 1 | -1/+1 | |
2024-04-08 | integrate ssqosid extension (#1331) | Ved Shanbhogue | 3 | -2/+131 | |
2024-04-08 | Merge pull request #1329 from nibrunieAtSi5/patch-2 | Andrew Waterman | 1 | -1/+1 | |
[scalar-crypto] fixing typo in bitmanip extension list in zkt | |||||
2024-04-08 | Merge pull request #1330 from ved-rivos/svvptc | Andrew Waterman | 1 | -0/+26 | |
Integrate Svvptc standard extension | |||||
2024-04-08 | integrate Svvptc standard extension | Ved Shanbhogue | 1 | -0/+26 | |
2024-04-08 | Merge pull request #1299 from riscv/preface-updateriscv-isa-release-3e7d734-2024-04-08 | Bill Traynor | 4 | -17/+109 | |
Preface update | |||||
2024-04-08 | Merge branch 'main' into preface-update | Bill Traynor | 15 | -264/+175 | |
Signed-off-by: Bill Traynor <wmat@riscv.org> | |||||
2024-04-07 | [scalar-crypto] fixing typo in bitmanip extension list in zkt | Nicolas Brunie | 1 | -1/+1 | |
Signed-off-by: Nicolas Brunie <82109999+nibrunieAtSi5@users.noreply.github.com> | |||||
2024-04-07 | Merge pull request #1327 from huxuan0307/patch-2 | Andrew Waterman | 1 | -1/+1 | |
Fix typo in hypervisor.adoc | |||||
2024-04-08 | Fix typo in hypervisor.adoc | huxuan0307 | 1 | -1/+1 | |
* `vstap` should be `vsatp` Signed-off-by: huxuan0307 <39661208+huxuan0307@users.noreply.github.com> | |||||
2024-04-05 | Merge pull request #1311 from riscv/op-veriscv-isa-release-e6eb7fd-2024-04-05riscv-isa-release-e2d4158-2024-04-05 | Andrew Waterman | 2 | -23/+23 | |
Opcode 0x77 is named OP-VE, for "Vector Extensions" | |||||
2024-04-05 | Merge pull request #1326 from riscv/table-fonts-fix | Andrew Waterman | 1 | -1/+1 | |
Removing font-size setting of 11.5 on codespan. | |||||
2024-04-05 | Removing font-size setting of 11.5 on codespan. | wmat | 1 | -1/+1 | |
Commented out the font-size: 11.5 in the codespan section. | |||||
2024-04-05 | Moving note about draft Zam extension to unpriv preface. | wmat | 4 | -3/+9 | |
Moving the note about the Zam extension to the unpriv preface. | |||||
2024-04-05 | Merge pull request #1319 from riscv/cmo-editorial-fixesriscv-isa-release-75a7fe1-2024-04-05 | Bill Traynor | 1 | -1/+3 | |
Adding *tval address explanation text. | |||||
2024-04-05 | Merge pull request #1324 from riscv/kersten1-patch-4riscv-isa-release-15b6cbb-2024-04-05 | Bill Traynor | 1 | -72/+72 | |
Reordering | |||||
2024-04-05 | Change a physical address to any. | wmat | 1 | -1/+1 | |
This addresses issue #1325 and updates "A cache block is identified a physical address..." to "any physical address". | |||||
2024-04-04 | Merge pull request #1323 from riscv/sscofpmfriscv-isa-release-7dd8995-2024-04-05 | Andrew Waterman | 5 | -131/+63 | |
Integrate Sscofpmf into priv spec more smoothly | |||||
2024-04-04 | Remove pseudoinstructions from B table | Andrew Waterman | 1 | -10/+1 | |
2024-04-04 | Reordering | Kersten Richter | 1 | -72/+72 | |
Updates per issue - https://github.com/riscv/riscv-isa-manual/issues/1282 Signed-off-by: Kersten Richter <kersten@riscv.org> | |||||
2024-04-04 | Improve Sscofpmf section headers | Andrew Waterman | 1 | -6/+2 | |
2024-04-04 | Remove bits of Sscofpmf that had already been integrated | Andrew Waterman | 1 | -42/+0 | |
2024-04-04 | Remove unnecessary figure | Andrew Waterman | 2 | -23/+0 | |
2024-04-04 | Integrate Sscofpmf RV32 changes into priv spec | Andrew Waterman | 3 | -29/+9 | |
2024-04-04 | Move mhpmevent CSR numbers to main CSR table | Andrew Waterman | 2 | -5/+20 | |
2024-04-04 | Format Sscofpmf section to resemble Smcntrpmf section | Andrew Waterman | 1 | -17/+21 | |
2024-04-04 | Move scountovf CSR number to main CSR table | Andrew Waterman | 2 | -9/+11 | |
2024-04-04 | Sscofpmf editorial fixes. (#1316)riscv-isa-release-cdff4e7-2024-04-04 | Bill Traynor | 1 | -3/+3 | |
* Sscofpmf editorial fixes. For the beginning of the descriptions of bits 58 and 59, "If set, ..." should instead be "If set and the H extension is implemented, ...". In the last paragraph, "In M and S modes, ..." should instead say "In S mode, ...". * Rewording description for bits 58 & 59. Reworded Bits 58 & 59 description to "If set, then counting of events in VU-mode is inhibited. But if the H extension is implemented, then this bit is read-only-zero." * Updated scountovf as described. Updated the text for scountovf. * grammar fix --------- Co-authored-by: Andrew Waterman <andrew@sifive.com> | |||||
2024-04-04 | Zcmop is ratified/1.0riscv-isa-release-c9cb59e-2024-04-04riscv-isa-release-c7d82c0-2024-04-04 | Andrew Waterman | 1 | -7/+1 | |
2024-04-04 | Sstc editorial fixes. (#1315) | Bill Traynor | 1 | -3/+3 | |
* Sstc editorial fixes. The second to last paragraph starts "When STCE in menvcfg is zero, ...". This should be clarified to say "When this extension is implemented and STCE in menvcfg is zero, ...". And ditto for the beginning of the last paragraph. * Rewording final paragraph for STCE clarity. Change wording to "But when STCE is menvcfg is one and STCE in henvcfg is zero". | |||||
2024-04-04 | Merge pull request #1320 from riscv/smstateen-editorial-fix | Andrew Waterman | 1 | -1/+3 | |
Adding Ssstateen to chapter. | |||||
2024-04-04 | Adding Ssstateen to chapter. | wmat | 1 | -1/+3 | |
Adding Ssstateen to chapter and adding paragraph to Proposal section. | |||||
2024-04-04 | Adding *tval address explanation text. | wmat | 1 | -0/+2 | |
Adding *tval address explanation text. This is Issue #1317. | |||||
2024-04-04 | Restoring deletion of line about Zam extension. | wmat | 1 | -0/+1 | |
Restoring deleted line about the draft Zam extension as per Andrew's comment. | |||||
2024-04-03 | Uncapitalize word ALL. | wmat | 1 | -1/+1 | |
Change inclusiong statement to uncapitalize word ALL and change "up to" to "through". | |||||
2024-04-03 | Remove git commit history and update inclusion statement. | wmat | 2 | -71/+2 | |
Removing git commit history from prefaces. Updating inclusion statement to be consistent. | |||||
2024-04-02 | Opcode 0x77 is named OP-VE, for "Vector Extensions" | Andrew Waterman | 2 | -23/+23 | |
Resolves #1310 This major opcode is currently used by vector crypto extensions. It'll likely be used by future vector extensions, as well. The official naming table currently describes this opcode as _reserved_, which is obviously no longer the case. Informally, it has sometimes been referred to as OP-P, since there was once a plan to encode the packed-SIMD extensions there. The vector crypto spec reflects this informal usage; this commit fixes that up. (The plan to use OP-P for packed SIMD has been superseded by a proposal to use brownfield space elsewhere.) | |||||
2024-04-02 | Zimop is ratified/1.0zimop-1.0 | Andrew Waterman | 1 | -7/+1 | |
2024-03-29 | Renaming Zc to Zce | wmat | 1 | -1/+1 | |
Renaming Zc to Zce | |||||
2024-03-29 | Applying suggestions to list all Z* extensions | wmat | 2 | -3/+14 | |
Expanding Z* extension list. | |||||
2024-03-28 | Merge pull request #1307 from nibrunieAtSi5/patch-1 | Bill Traynor | 2 | -2/+2 | |
Swap scalar and vector crypto chapters | |||||
2024-03-28 | unifying vector-crypto title with scalar-crypto | Nicolas Brunie | 1 | -1/+1 | |
Signed-off-by: Nicolas Brunie <82109999+nibrunieAtSi5@users.noreply.github.com> | |||||
2024-03-28 | Swap scalar and vector crypto chapters | Nicolas Brunie | 1 | -1/+1 | |
Signed-off-by: Nicolas Brunie <82109999+nibrunieAtSi5@users.noreply.github.com> | |||||
2024-03-27 | Merge pull request #1300 from ASintzoff/typo-smstateen | Bill Traynor | 1 | -1/+1 | |
smstateen.adoc: fix typo in chapter title | |||||
2024-03-27 | Update src/colophon.adoc | Kersten Richter | 1 | -1/+1 | |
Signed-off-by: Kersten Richter <kersten@riscv.org> | |||||
2024-03-27 | Update src/priv-preface.adoc | Kersten Richter | 1 | -1/+1 | |
Signed-off-by: Kersten Richter <kersten@riscv.org> | |||||
2024-03-27 | Update priv-preface.adoc | Kersten Richter | 1 | -25/+25 | |
Signed-off-by: Kersten Richter <kersten@riscv.org> |