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-rw-r--r--src/machine.tex6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/machine.tex b/src/machine.tex
index 4d43bae..024daca 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -1624,6 +1624,12 @@ are 32-bit registers that
control the availability of the hardware performance monitoring
counters to the next-lowest privileged mode.
+The settings in these registers only control accessibility. The act
+of reading or writing these registers, does not affect the underlying
+counters, except for the expected side effects of any instruction
+execution (i.e., {\tt instret} will be incremented after a write to
+these CSRs).
+
When the CY, TM, IR, or HPM{\em n} bit in the {\tt mcounteren}
register is clear, attempts to read the {\tt cycle}, {\tt time}, {\tt
instret}, or {\tt hpmcounter{\em n}} register while executing in