diff options
Diffstat (limited to 'src/machine.tex')
| -rw-r--r-- | src/machine.tex | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/machine.tex b/src/machine.tex index 78d3f65..cb9b26c 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -1519,10 +1519,10 @@ external interrupt controller. When {\tt mip} is read with a CSR instruction, the value of the SEIP bit returned in the {\tt rd} destination register is the logical-OR of the software-writable bit and the -interrupt signal from the interrupt controller. However, the value -used in the read-modify-write sequence of a CSRRS or CSRRC instruction -contains only the software-writable SEIP bit, ignoring the interrupt value -from the external interrupt controller. +interrupt signal from the interrupt controller. +However, only the software-writeable SEIP bit participates in the +read-modify-write sequence of a CSRRS or CSRRC instruction; the signal +from the external interrupt controller does not participate. \begin{commentary} The SEIP field behavior is designed to allow a higher privilege |